Marcos D. Pizarro Crespo

Array ( [id] => 582171 [patent_doc_number] => 07449407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Air gap for dual damascene applications' [patent_app_type] => utility [patent_app_number] => 10/295719 [patent_app_country] => US [patent_app_date] => 2002-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 43 [patent_no_of_words] => 7779 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/449/07449407.pdf [firstpage_image] =>[orig_patent_app_number] => 10295719 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1002695 [patent_doc_number] => 06909152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'High density DRAM with reduced peripheral device area and method of manufacture' [patent_app_type] => utility [patent_app_number] => 10/294329 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2732 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909152.pdf [firstpage_image] =>[orig_patent_app_number] => 10294329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6811775 [patent_doc_number] => 20030071325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Method of making an integrated circuit inductor' [patent_app_type] => new [patent_app_number] => 10/298418 [patent_app_country] => US [patent_app_date] => 2002-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2024 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20030071325.pdf [firstpage_image] =>[orig_patent_app_number] => 10298418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7189790 [patent_doc_number] => 20040084744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-06 [patent_title] => 'Semiconductor component and method of manufacturing same' [patent_app_type] => new [patent_app_number] => 10/286169 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7162 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20040084744.pdf [firstpage_image] =>[orig_patent_app_number] => 10286169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6799491 [patent_doc_number] => 20030094655 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Method for measuring temperature in a wide range using a tunnel junction' [patent_app_type] => new [patent_app_number] => 10/258629 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1350 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094655.pdf [firstpage_image] =>[orig_patent_app_number] => 10258629 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7205172 [patent_doc_number] => 20040070071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Diamond composite heat spreader and associated methods' [patent_app_type] => new [patent_app_number] => 10/270018 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9174 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20040070071.pdf [firstpage_image] =>[orig_patent_app_number] => 10270018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1101620 [patent_doc_number] => 06815276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Segmented power MOSFET of safe operation' [patent_app_type] => B2 [patent_app_number] => 10/264038 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7083 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815276.pdf [firstpage_image] =>[orig_patent_app_number] => 10264038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1047328 [patent_doc_number] => 06864545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-08 [patent_title] => 'Semiconductor device including low-resistance wires electrically connected to impurity layers' [patent_app_type] => utility [patent_app_number] => 10/261509 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 35 [patent_no_of_words] => 9926 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/864/06864545.pdf [firstpage_image] =>[orig_patent_app_number] => 10261509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1102607 [patent_doc_number] => 06815734 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-09 [patent_title] => 'Varied trench depth for thyristor isolation' [patent_app_type] => B1 [patent_app_number] => 10/262758 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5531 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815734.pdf [firstpage_image] =>[orig_patent_app_number] => 10262758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6799502 [patent_doc_number] => 20030094666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Interposer' [patent_app_type] => new [patent_app_number] => 10/263599 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6713 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20030094666.pdf [firstpage_image] =>[orig_patent_app_number] => 10263599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7609537 [patent_doc_number] => 06998652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-14 [patent_title] => 'Trench isolation for thyristor-based device' [patent_app_type] => utility [patent_app_number] => 10/262729 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5767 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/998/06998652.pdf [firstpage_image] =>[orig_patent_app_number] => 10262729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 742675 [patent_doc_number] => 07030425 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-18 [patent_title] => 'Buried emitter contact for thyristor-based semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/262696 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/030/07030425.pdf [firstpage_image] =>[orig_patent_app_number] => 10262696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6713778 [patent_doc_number] => 20030025126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Ultra-thin SOI MOS transistors' [patent_app_type] => new [patent_app_number] => 10/261447 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1889 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20030025126.pdf [firstpage_image] =>[orig_patent_app_number] => 10261447 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7278813 [patent_doc_number] => 20040061190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Method and structure for tungsten gate metal surface treatment while preventing oxidation' [patent_app_type] => new [patent_app_number] => 10/261218 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1845 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061190.pdf [firstpage_image] =>[orig_patent_app_number] => 10261218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1167689 [patent_doc_number] => 06759702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Memory cell with vertical transistor and trench capacitor with reduced burried strap' [patent_app_type] => B2 [patent_app_number] => 10/261559 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4213 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759702.pdf [firstpage_image] =>[orig_patent_app_number] => 10261559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1150124 [patent_doc_number] => 06774455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Semiconductor device with a collector contact in a depressed well-region' [patent_app_type] => B2 [patent_app_number] => 10/262206 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3502 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774455.pdf [firstpage_image] =>[orig_patent_app_number] => 10262206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7278815 [patent_doc_number] => 20040061192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Fabricating complex micro-electromechanical systems using a flip bonding technique' [patent_app_type] => new [patent_app_number] => 10/259188 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2758 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20040061192.pdf [firstpage_image] =>[orig_patent_app_number] => 10259188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6837199 [patent_doc_number] => 20030034539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/255883 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3929 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034539.pdf [firstpage_image] =>[orig_patent_app_number] => 10255883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6690899 [patent_doc_number] => 20030038331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Semiconductor device having a barrier layer' [patent_app_type] => new [patent_app_number] => 10/254222 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4629 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20030038331.pdf [firstpage_image] =>[orig_patent_app_number] => 10254222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6774314 [patent_doc_number] => 20030017652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Semiconductor device, its fabrication method and electronic device' [patent_app_type] => new [patent_app_number] => 10/252545 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11609 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20030017652.pdf [firstpage_image] =>[orig_patent_app_number] => 10252545 [rel_patent_id] =>[rel_patent_doc_number] =>)