Marcus A Jackson
Examiner (ID: 8879)
Most Active Art Unit | 2916 |
Art Unit(s) | 2913, 2900, 2901, 2911, 2916 |
Total Applications | 11214 |
Issued Applications | 11154 |
Pending Applications | 1 |
Abandoned Applications | 59 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 8816584
[patent_doc_number] => 20130117629
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-09
[patent_title] => 'BELIEF PROPAGATION PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 13/521505
[patent_app_country] => US
[patent_app_date] => 2011-01-11
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13521505
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/521505 | Belief propagation processor | Jan 10, 2011 | Issued |
Array
(
[id] => 6147293
[patent_doc_number] => 20110131370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-02
[patent_title] => 'DISABLING OUTBOUND DRIVERS FOR A LAST MEMORY BUFFER ON A MEMORY CHANNEL'
[patent_app_type] => utility
[patent_app_number] => 12/977395
[patent_app_country] => US
[patent_app_date] => 2010-12-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0131/20110131370.pdf
[firstpage_image] =>[orig_patent_app_number] => 12977395
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/977395 | Disabling outbound drivers for a last memory buffer on a memory channel | Dec 22, 2010 | Issued |
Array
(
[id] => 6040703
[patent_doc_number] => 20110093752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-04-21
[patent_title] => 'Method and Apparatus for Synthesis of Augmented Multimode Compactors'
[patent_app_type] => utility
[patent_app_number] => 12/976042
[patent_app_country] => US
[patent_app_date] => 2010-12-22
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[pdf_file] => publications/A1/0093/20110093752.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/976042 | Method and apparatus for synthesis of augmented multimode compactors | Dec 21, 2010 | Issued |
Array
(
[id] => 7537700
[patent_doc_number] => 08051343
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-01
[patent_title] => 'Method of testing a memory module and hub of the memory module'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/926043 | Method of testing a memory module and hub of the memory module | Oct 21, 2010 | Issued |
Array
(
[id] => 7517930
[patent_doc_number] => 08042012
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[patent_issue_date] => 2011-10-18
[patent_title] => 'Systems and devices including memory with built-in self test and methods of making and using the same'
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Array
(
[id] => 8109483
[patent_doc_number] => 08156396
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[patent_issue_date] => 2012-04-10
[patent_title] => 'Method and system for correcting timing errors in high data rate automated test equipment'
[patent_app_type] => utility
[patent_app_number] => 12/898621
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/898621 | Method and system for correcting timing errors in high data rate automated test equipment | Oct 4, 2010 | Issued |
Array
(
[id] => 6644276
[patent_doc_number] => 20100313080
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[patent_issue_date] => 2010-12-09
[patent_title] => 'CAN SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/846404
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/846404 | CAN system | Jul 28, 2010 | Issued |
Array
(
[id] => 6191987
[patent_doc_number] => 20110023741
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-03
[patent_title] => 'FUSE INFORMATION DETECTION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/843887
[patent_app_country] => US
[patent_app_date] => 2010-07-27
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[pdf_file] => publications/A1/0023/20110023741.pdf
[firstpage_image] =>[orig_patent_app_number] => 12843887
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/843887 | FUSE INFORMATION DETECTION CIRCUIT | Jul 26, 2010 | Abandoned |
Array
(
[id] => 8242555
[patent_doc_number] => 20120151281
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'APPARATUSES AND METHODS FOR IDENTIFICATION OF EXTERNAL INFLUENCES ON AT LEAST ONE PROCESSING UNIT OF AN EMBEDDED SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/391164
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[patent_app_date] => 2010-07-16
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Array
(
[id] => 6463399
[patent_doc_number] => 20100281315
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-11-04
[patent_title] => 'MEMORY CHANNEL WITH BIT LANE FAIL-OVER'
[patent_app_type] => utility
[patent_app_number] => 12/836953
[patent_app_country] => US
[patent_app_date] => 2010-07-15
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 12836953
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/836953 | Memory channel with bit lane fail-over | Jul 14, 2010 | Issued |
Array
(
[id] => 9062930
[patent_doc_number] => 08549384
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[patent_kind] => B1
[patent_issue_date] => 2013-10-01
[patent_title] => 'Method and apparatus for determining, based on an error correction code, one or more locations to store data in a flash memory'
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[patent_app_number] => 12/822664
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/822664 | Method and apparatus for determining, based on an error correction code, one or more locations to store data in a flash memory | Jun 23, 2010 | Issued |
Array
(
[id] => 9062925
[patent_doc_number] => 08549378
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[patent_kind] => B2
[patent_issue_date] => 2013-10-01
[patent_title] => 'RAIM system using decoding of virtual ECC'
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Array
(
[id] => 7671652
[patent_doc_number] => 20110320921
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[patent_title] => 'FAILING BUS LANE DETECTION USING SYNDROME ANALYSIS'
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Array
(
[id] => 7671597
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Array
(
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Array
(
[id] => 8899547
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Array
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Array
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Array
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Array
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