Marcus A Jackson
Examiner (ID: 8879)
Most Active Art Unit | 2916 |
Art Unit(s) | 2913, 2900, 2901, 2911, 2916 |
Total Applications | 11214 |
Issued Applications | 11154 |
Pending Applications | 1 |
Abandoned Applications | 59 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9431061
[patent_doc_number] => 08707147
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-04-22
[patent_title] => 'Viterbi decoder method and apparatus with RI detector in servo channel'
[patent_app_type] => utility
[patent_app_number] => 13/925581
[patent_app_country] => US
[patent_app_date] => 2013-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 43
[patent_no_of_words] => 14628
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925581
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/925581 | Viterbi decoder method and apparatus with RI detector in servo channel | Jun 23, 2013 | Issued |
Array
(
[id] => 9431044
[patent_doc_number] => 08707129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-22
[patent_title] => 'Feedback signaling error detection and checking in MIMO wireless communication systems'
[patent_app_type] => utility
[patent_app_number] => 13/922833
[patent_app_country] => US
[patent_app_date] => 2013-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 7626
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 258
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922833
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/922833 | Feedback signaling error detection and checking in MIMO wireless communication systems | Jun 19, 2013 | Issued |
Array
(
[id] => 9444265
[patent_doc_number] => 08713401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-29
[patent_title] => 'Error recovery storage along a memory string'
[patent_app_type] => utility
[patent_app_number] => 13/919982
[patent_app_country] => US
[patent_app_date] => 2013-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6129
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919982
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/919982 | Error recovery storage along a memory string | Jun 16, 2013 | Issued |
Array
(
[id] => 9665910
[patent_doc_number] => 08812919
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-19
[patent_title] => 'Method and apparatus for evaluating and optimizing a signaling system'
[patent_app_type] => utility
[patent_app_number] => 13/915896
[patent_app_country] => US
[patent_app_date] => 2013-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 34
[patent_no_of_words] => 20351
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/915896 | Method and apparatus for evaluating and optimizing a signaling system | Jun 11, 2013 | Issued |
Array
(
[id] => 9093048
[patent_doc_number] => 20130272360
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-17
[patent_title] => 'Method And Apparatus For Evaluating And Optimizing A Signaling System'
[patent_app_type] => utility
[patent_app_number] => 13/915879
[patent_app_country] => US
[patent_app_date] => 2013-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 20352
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915879
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/915879 | Method and apparatus for evaluating and optimizing a signaling system | Jun 11, 2013 | Issued |
Array
(
[id] => 9083294
[patent_doc_number] => 20130268824
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-10
[patent_title] => 'ADAPTIVE OVER-PROVISIONING IN MEMORY SYSTEMS'
[patent_app_type] => utility
[patent_app_number] => 13/908018
[patent_app_country] => US
[patent_app_date] => 2013-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 11381
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13908018
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/908018 | Adaptive over-provisioning in memory systems | Jun 2, 2013 | Issued |
Array
(
[id] => 9056913
[patent_doc_number] => 20130254627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'STRIPE-BASED MEMORY OPERATION'
[patent_app_type] => utility
[patent_app_number] => 13/899147
[patent_app_country] => US
[patent_app_date] => 2013-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9506
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13899147
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/899147 | Stripe-based memory operation | May 20, 2013 | Issued |
Array
(
[id] => 9163578
[patent_doc_number] => 20130311855
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'METHOD FOR PROCESSING A NON-VOLATILE MEMORY, IN PARTICULAR A MEMORY OF THE EEPROM TYPE, FOR THE STORAGE THEN THE EXTRACTION OF INFORMATION, AND CORRESPONDING MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/897940
[patent_app_country] => US
[patent_app_date] => 2013-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4765
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897940
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/897940 | Method for processing a non-volatile memory, in particular a memory of the EEPROM type, for the storage then the extraction of information, and corresponding memory device | May 19, 2013 | Issued |
Array
(
[id] => 9207735
[patent_doc_number] => 20140006912
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-02
[patent_title] => 'COMMUNICATION SYSTEM VIA CASCADE CONNECTION AND COMMUNICATION DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/897019
[patent_app_country] => US
[patent_app_date] => 2013-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10120
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897019
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/897019 | Communication system via cascade connection and communication device | May 16, 2013 | Issued |
Array
(
[id] => 9056890
[patent_doc_number] => 20130254604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'METHODS AND APPARATUS FOR ERROR RATE ESTIMATION'
[patent_app_type] => utility
[patent_app_number] => 13/897312
[patent_app_country] => US
[patent_app_date] => 2013-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8447
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897312
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/897312 | Methods and apparatus for error rate estimation | May 16, 2013 | Issued |
Array
(
[id] => 10941632
[patent_doc_number] => 20140344653
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-11-20
[patent_title] => 'HIGH PERFORMANCE READ-MODIFY-WRITE SYSTEM PROVIDING LINE-RATE MERGING OF DATAFRAME SEGMENTS IN HARDWARE'
[patent_app_type] => utility
[patent_app_number] => 13/895928
[patent_app_country] => US
[patent_app_date] => 2013-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3978
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13895928
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/895928 | High performance read-modify-write system providing line-rate merging of dataframe segments in hardware | May 15, 2013 | Issued |
Array
(
[id] => 9954456
[patent_doc_number] => 09003270
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-04-07
[patent_title] => 'Methods and apparatus for temporarily storing parity information for data stored in a storage device'
[patent_app_type] => utility
[patent_app_number] => 13/894776
[patent_app_country] => US
[patent_app_date] => 2013-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4637
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13894776
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/894776 | Methods and apparatus for temporarily storing parity information for data stored in a storage device | May 14, 2013 | Issued |
Array
(
[id] => 9746103
[patent_doc_number] => 20140281822
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'METHOD AND APPARATUS FOR GENERATION OF SOFT DECISION ERROR CORRECTION CODE INFORMATION'
[patent_app_type] => utility
[patent_app_number] => 13/893832
[patent_app_country] => US
[patent_app_date] => 2013-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3514
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13893832
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/893832 | Method and apparatus for generation of soft decision error correction code information | May 13, 2013 | Issued |
Array
(
[id] => 9555727
[patent_doc_number] => 08762801
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-06-24
[patent_title] => 'Method and system for detecting and repairing defective memory cells without reporting a defective memory cell'
[patent_app_type] => utility
[patent_app_number] => 13/862991
[patent_app_country] => US
[patent_app_date] => 2013-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 32
[patent_no_of_words] => 7851
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13862991
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/862991 | Method and system for detecting and repairing defective memory cells without reporting a defective memory cell | Apr 14, 2013 | Issued |
Array
(
[id] => 9352425
[patent_doc_number] => 08671329
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-11
[patent_title] => 'Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes'
[patent_app_type] => utility
[patent_app_number] => 13/860773
[patent_app_country] => US
[patent_app_date] => 2013-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 27
[patent_no_of_words] => 17141
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860773
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/860773 | Low overhead and timing improved architecture for performing error checking and correction for memories and buses in system-on-chips, and other circuits, systems and processes | Apr 10, 2013 | Issued |
Array
(
[id] => 9745409
[patent_doc_number] => 20140281128
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'DECODING DATA STORED IN SOLID-STATE MEMORY'
[patent_app_type] => utility
[patent_app_number] => 13/829904
[patent_app_country] => US
[patent_app_date] => 2013-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6605
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13829904
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/829904 | Decoding data stored in solid-state memory | Mar 13, 2013 | Issued |
Array
(
[id] => 9980539
[patent_doc_number] => 09026870
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-05
[patent_title] => 'Memory module and a memory test system for testing the same'
[patent_app_type] => utility
[patent_app_number] => 13/800605
[patent_app_country] => US
[patent_app_date] => 2013-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 5806
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13800605
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/800605 | Memory module and a memory test system for testing the same | Mar 12, 2013 | Issued |
Array
(
[id] => 9980552
[patent_doc_number] => 09026883
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-05
[patent_title] => 'Decoding apparatus with adaptive control over external buffer interface and turbo decoder and related decoding method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/798200
[patent_app_country] => US
[patent_app_date] => 2013-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 8131
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13798200
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/798200 | Decoding apparatus with adaptive control over external buffer interface and turbo decoder and related decoding method thereof | Mar 12, 2013 | Issued |
Array
(
[id] => 9540221
[patent_doc_number] => 20140164868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-06-12
[patent_title] => 'FLASH MEMORY READ ERROR RECOVERY WITH SOFT-DECISION DECODE'
[patent_app_type] => utility
[patent_app_number] => 13/798864
[patent_app_country] => US
[patent_app_date] => 2013-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5019
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13798864
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/798864 | Flash memory read error recovery with soft-decision decode | Mar 12, 2013 | Issued |
Array
(
[id] => 10901581
[patent_doc_number] => 08924824
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-12-30
[patent_title] => 'Soft-decision input generation for data storage systems'
[patent_app_type] => utility
[patent_app_number] => 13/797923
[patent_app_country] => US
[patent_app_date] => 2013-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7708
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13797923
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/797923 | Soft-decision input generation for data storage systems | Mar 11, 2013 | Issued |