Marcus A Jackson

Array ( [id] => 8935714 [patent_doc_number] => 08495436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-23 [patent_title] => 'System and method for memory testing in electronic circuits' [patent_app_type] => utility [patent_app_number] => 13/525353 [patent_app_country] => US [patent_app_date] => 2012-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3242 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13525353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8752175 [patent_doc_number] => 08418020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'LDPC selective decoding scheduling using a cost function' [patent_app_type] => utility [patent_app_number] => 13/490947 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13490947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8407924 [patent_doc_number] => 20120239992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'METHOD OF CONTROLLING A SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/486718 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12474 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8552332 [patent_doc_number] => 08327231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'System and method for achieving higher data rates in physical layer devices' [patent_app_type] => utility [patent_app_number] => 13/484667 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3992 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13484667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10901583 [patent_doc_number] => 08924826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Forward error correction encoder' [patent_app_type] => utility [patent_app_number] => 13/468897 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2426 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468897 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9500163 [patent_doc_number] => 08739004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Symbol flipping LDPC decoding system' [patent_app_type] => utility [patent_app_number] => 13/468968 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468968 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9585873 [patent_doc_number] => 08775883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Method of and an arrangement for automatically measuring electric connections of electronic circuit arrangements mounted on printed circuit boards' [patent_app_type] => utility [patent_app_number] => 13/467762 [patent_app_country] => US [patent_app_date] => 2012-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 8532 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13467762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9695443 [patent_doc_number] => 08826072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Method and system for real-time error mitigation' [patent_app_type] => utility [patent_app_number] => 13/467758 [patent_app_country] => US [patent_app_date] => 2012-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 14641 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13467758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9150596 [patent_doc_number] => 20130305119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'Method and Device for Correction of Ternary Stored Binary Data' [patent_app_type] => utility [patent_app_number] => 13/466400 [patent_app_country] => US [patent_app_date] => 2012-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13213 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13466400 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9585885 [patent_doc_number] => 08775897 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Data processing system with failure recovery' [patent_app_type] => utility [patent_app_number] => 13/465214 [patent_app_country] => US [patent_app_date] => 2012-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7813 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13465214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8497250 [patent_doc_number] => 20120296658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'METHOD AND APPARATUS FOR REAL-TIME MULTIDIMENSIONAL ADAPTATION OF AN AUDIO CODING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/465331 [patent_app_country] => US [patent_app_date] => 2012-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11377 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13465331 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8372518 [patent_doc_number] => 20120221911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-30 [patent_title] => 'EMBEDDED PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/465247 [patent_app_country] => US [patent_app_date] => 2012-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8809 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13465247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8678746 [patent_doc_number] => 08386881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Semiconductor memory device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 13/465624 [patent_app_country] => US [patent_app_date] => 2012-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6039 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13465624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9315018 [patent_doc_number] => 08656253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Storing portions of data in a dispersed storage network' [patent_app_type] => utility [patent_app_number] => 13/464048 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 20790 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464048 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9714470 [patent_doc_number] => 08839073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Zero-one balance management in a solid-state disk controller' [patent_app_type] => utility [patent_app_number] => 13/464433 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 19389 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8511995 [patent_doc_number] => 20120311403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'PRIORITIZED DELETING OF SLICES STORED IN A DISPERSED STORAGE NETWORK' [patent_app_type] => utility [patent_app_number] => 13/464846 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 21919 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9137273 [patent_doc_number] => 20130297987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'Method and Apparatus for Reading NAND Flash Memory' [patent_app_type] => utility [patent_app_number] => 13/464535 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7246 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464535 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8501465 [patent_doc_number] => 20120300873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'FORWARD ERROR CORRECTION WITH EXTENDED EFFECTIVE BLOCK SIZE' [patent_app_type] => utility [patent_app_number] => 13/464033 [patent_app_country] => US [patent_app_date] => 2012-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10000 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13464033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9472474 [patent_doc_number] => 08726122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'High throughput LDPC decoder' [patent_app_type] => utility [patent_app_number] => 13/463774 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7404 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13463774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8497860 [patent_doc_number] => 20120297268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/462846 [patent_app_country] => US [patent_app_date] => 2012-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7136 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462846 [rel_patent_id] =>[rel_patent_doc_number] =>)