
Marcus E. Windrich
Examiner (ID: 900, Phone: (571)272-6417 , Office: P/3646 )
| Most Active Art Unit | 3646 |
| Art Unit(s) | 3646, 3619 |
| Total Applications | 906 |
| Issued Applications | 670 |
| Pending Applications | 85 |
| Abandoned Applications | 168 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16502728
[patent_doc_number] => 10868129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Gate spacer and methods of forming
[patent_app_type] => utility
[patent_app_number] => 16/568767
[patent_app_country] => US
[patent_app_date] => 2019-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 8735
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568767
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/568767 | Gate spacer and methods of forming | Sep 11, 2019 | Issued |
Array
(
[id] => 15351913
[patent_doc_number] => 20200013848
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/566223
[patent_app_country] => US
[patent_app_date] => 2019-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18716
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566223
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/566223 | Display device | Sep 9, 2019 | Issued |
Array
(
[id] => 18857441
[patent_doc_number] => 11855037
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Method for producing an electrically conductive connection on a substrate, microelectronic device and method for the production thereof
[patent_app_type] => utility
[patent_app_number] => 17/250702
[patent_app_country] => US
[patent_app_date] => 2019-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 8620
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17250702
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/250702 | Method for producing an electrically conductive connection on a substrate, microelectronic device and method for the production thereof | Aug 21, 2019 | Issued |
Array
(
[id] => 16662412
[patent_doc_number] => 20210059049
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-25
[patent_title] => SPACE EFFICIENT LAYOUT OF PRINTED CIRCUIT BOARD POWER VIAS
[patent_app_type] => utility
[patent_app_number] => 16/545028
[patent_app_country] => US
[patent_app_date] => 2019-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7199
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545028
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/545028 | SPACE EFFICIENT LAYOUT OF PRINTED CIRCUIT BOARD POWER VIAS | Aug 19, 2019 | Abandoned |
Array
(
[id] => 16699867
[patent_doc_number] => 10950475
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-03-16
[patent_title] => Method and apparatus for processing a substrate using non-contact temperature measurement
[patent_app_type] => utility
[patent_app_number] => 16/545537
[patent_app_country] => US
[patent_app_date] => 2019-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5783
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16545537
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/545537 | Method and apparatus for processing a substrate using non-contact temperature measurement | Aug 19, 2019 | Issued |
Array
(
[id] => 15625437
[patent_doc_number] => 20200083123
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => SiC SUBSTRATE EVALUATION METHOD, SiC EPITAXIAL WAFER MANUFACTURING METHOD, AND SiC EPITAXIAL WAFER
[patent_app_type] => utility
[patent_app_number] => 16/544998
[patent_app_country] => US
[patent_app_date] => 2019-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3888
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544998
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/544998 | SiC substrate evaluation method, SiC epitaxial wafer manufacturing method, and SiC epitaxial wafer | Aug 19, 2019 | Issued |
Array
(
[id] => 16301130
[patent_doc_number] => 20200286853
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-10
[patent_title] => SUBSTRATE BONDING APPARATUS, SUBSTRATE PAIRING APPARATUS, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
[patent_app_type] => utility
[patent_app_number] => 16/542431
[patent_app_country] => US
[patent_app_date] => 2019-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6499
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542431
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/542431 | Substrate bonding apparatus, substrate pairing apparatus, and semiconductor device manufacturing method | Aug 15, 2019 | Issued |
Array
(
[id] => 16605287
[patent_doc_number] => 10906274
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-02
[patent_title] => Laminate substrate with sintered components
[patent_app_type] => utility
[patent_app_number] => 16/543043
[patent_app_country] => US
[patent_app_date] => 2019-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 6899
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16543043
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/543043 | Laminate substrate with sintered components | Aug 15, 2019 | Issued |
Array
(
[id] => 17270446
[patent_doc_number] => 11195875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-07
[patent_title] => X-ray detecting panel and method of operating the same, and X-ray detecting device
[patent_app_type] => utility
[patent_app_number] => 16/541327
[patent_app_country] => US
[patent_app_date] => 2019-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5601
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 281
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541327
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/541327 | X-ray detecting panel and method of operating the same, and X-ray detecting device | Aug 14, 2019 | Issued |
Array
(
[id] => 16631565
[patent_doc_number] => 20210050218
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => PLANARIZATION PROCESS, APPARATUS AND METHOD OF MANUFACTURING AN ARTICLE
[patent_app_type] => utility
[patent_app_number] => 16/541618
[patent_app_country] => US
[patent_app_date] => 2019-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7590
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541618
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/541618 | Planarization process, apparatus and method of manufacturing an article | Aug 14, 2019 | Issued |
Array
(
[id] => 16631593
[patent_doc_number] => 20210050246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => PLANARIZATION PROCESS, APPARATUS AND METHOD OF MANUFACTURING AN ARTICLE
[patent_app_type] => utility
[patent_app_number] => 16/542066
[patent_app_country] => US
[patent_app_date] => 2019-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7847
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542066
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/542066 | Planarization process, apparatus and method of manufacturing an article | Aug 14, 2019 | Issued |
Array
(
[id] => 15531147
[patent_doc_number] => 20200057879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-20
[patent_title] => MANUFACTURING PROCESS OF A PIXEL ARRAY OF A THERMAL PATTERN SENSOR AND ASSOCIATED SENSOR
[patent_app_type] => utility
[patent_app_number] => 16/542236
[patent_app_country] => US
[patent_app_date] => 2019-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3959
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542236
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/542236 | Manufacturing process of a pixel array of a thermal pattern sensor and associated sensor | Aug 14, 2019 | Issued |
Array
(
[id] => 16631610
[patent_doc_number] => 20210050263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => HYBRID WAFER DICING APPROACH USING A UNIFORM ROTATING BEAM LASER SCRIBING PROCESS AND PLASMA ETCH PROCESS
[patent_app_type] => utility
[patent_app_number] => 16/540899
[patent_app_country] => US
[patent_app_date] => 2019-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8388
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540899
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/540899 | Hybrid wafer dicing approach using a uniform rotating beam laser scribing process and plasma etch process | Aug 13, 2019 | Issued |
Array
(
[id] => 16668403
[patent_doc_number] => 10937658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-02
[patent_title] => LED wafer processing method
[patent_app_type] => utility
[patent_app_number] => 16/512539
[patent_app_country] => US
[patent_app_date] => 2019-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 7079
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16512539
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/512539 | LED wafer processing method | Jul 15, 2019 | Issued |
Array
(
[id] => 16495768
[patent_doc_number] => 10861819
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-12-08
[patent_title] => High-precision bond head positioning method and apparatus
[patent_app_type] => utility
[patent_app_number] => 16/503678
[patent_app_country] => US
[patent_app_date] => 2019-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 4505
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503678
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/503678 | High-precision bond head positioning method and apparatus | Jul 4, 2019 | Issued |
Array
(
[id] => 16521651
[patent_doc_number] => 10872877
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-22
[patent_title] => Method of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/502055
[patent_app_country] => US
[patent_app_date] => 2019-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 2818
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16502055
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/502055 | Method of manufacturing semiconductor device | Jul 2, 2019 | Issued |
Array
(
[id] => 15461813
[patent_doc_number] => 20200043731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-06
[patent_title] => LASER ANNEALING METHOD
[patent_app_type] => utility
[patent_app_number] => 16/503330
[patent_app_country] => US
[patent_app_date] => 2019-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11915
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503330
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/503330 | Laser annealing method | Jul 2, 2019 | Issued |
Array
(
[id] => 15030275
[patent_doc_number] => 20190326142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-24
[patent_title] => COLD FLUID SEMICONDUCTOR DEVICE RELEASE DURING PICK AND PLACE OPERATIONS, AND ASSOCIATED SYSTEMS AND METHODS
[patent_app_type] => utility
[patent_app_number] => 16/460956
[patent_app_country] => US
[patent_app_date] => 2019-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460956
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/460956 | Cold fluid semiconductor device release during pick and place operations, and associated systems and methods | Jul 1, 2019 | Issued |
Array
(
[id] => 16684292
[patent_doc_number] => 10943782
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-09
[patent_title] => Semiconductor device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/460468
[patent_app_country] => US
[patent_app_date] => 2019-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
[patent_figures_cnt] => 62
[patent_no_of_words] => 9592
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460468
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/460468 | Semiconductor device and method of manufacturing the same | Jul 1, 2019 | Issued |
Array
(
[id] => 17326521
[patent_doc_number] => 11217546
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-04
[patent_title] => Embedded voltage regulator structure and method forming same
[patent_app_type] => utility
[patent_app_number] => 16/458948
[patent_app_country] => US
[patent_app_date] => 2019-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 32
[patent_no_of_words] => 14828
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458948
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/458948 | Embedded voltage regulator structure and method forming same | Jun 30, 2019 | Issued |