Search

Marcus E. Windrich

Examiner (ID: 900, Phone: (571)272-6417 , Office: P/3646 )

Most Active Art Unit
3646
Art Unit(s)
3646, 3619
Total Applications
906
Issued Applications
670
Pending Applications
85
Abandoned Applications
168

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15873973 [patent_doc_number] => 20200144390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => METHOD FOR FORMING HEXAGONAL BORON NITRIDE THIN FILM, METHOD FOR FORMING MULTI-LAYERED STRUCTURE AND METHOD FOR MANUFACTURING SWITCHING ELEMENT USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/201293 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7252 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201293 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201293
Method for forming hexagonal boron nitride thin film, method for forming multi-layered structure and method for manufacturing switching element using the same Nov 26, 2018 Issued
Array ( [id] => 15873349 [patent_doc_number] => 20200144078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => CHIP PACKAGING DEVICE AND ALIGNMENT BONDING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/199668 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199668 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199668
Chip packaging device and alignment bonding method thereof Nov 25, 2018 Issued
Array ( [id] => 16148667 [patent_doc_number] => 10707415 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Methods and processes for forming devices from correlated electron material (CEM) [patent_app_type] => utility [patent_app_number] => 16/200214 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 44 [patent_no_of_words] => 14544 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200214
Methods and processes for forming devices from correlated electron material (CEM) Nov 25, 2018 Issued
Array ( [id] => 15488201 [patent_doc_number] => 10559458 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-11 [patent_title] => Method of forming oxynitride film [patent_app_type] => utility [patent_app_number] => 16/200100 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 11226 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200100
Method of forming oxynitride film Nov 25, 2018 Issued
Array ( [id] => 14079217 [patent_doc_number] => 20190088496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => METHOD OF PROCESSING TARGET OBJECT [patent_app_type] => utility [patent_app_number] => 16/194549 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194549 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/194549
Method of processing target object Nov 18, 2018 Issued
Array ( [id] => 14859055 [patent_doc_number] => 10418262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Gas floated workpiece supporting apparatus and noncontact workpiece support method [patent_app_type] => utility [patent_app_number] => 16/185902 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7187 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185902 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185902
Gas floated workpiece supporting apparatus and noncontact workpiece support method Nov 8, 2018 Issued
Array ( [id] => 14024813 [patent_doc_number] => 20190074400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => CONDUCTIVE FOIL BASED METALLIZATION OF SOLAR CELLS [patent_app_type] => utility [patent_app_number] => 16/174030 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174030 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174030
Conductive foil based metallization of solar cells Oct 28, 2018 Issued
Array ( [id] => 13963119 [patent_doc_number] => 20190057904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => POLY GATE EXTENSION DESIGN METHODOLOGY TO IMPROVE CMOS PERFORMANCE IN DUAL STRESS LINER PROCESS FLOW [patent_app_type] => utility [patent_app_number] => 16/167903 [patent_app_country] => US [patent_app_date] => 2018-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1881 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167903 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/167903
Poly gate extension design methodology to improve CMOS performance in dual stress liner process flow Oct 22, 2018 Issued
Array ( [id] => 16233888 [patent_doc_number] => 10741451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => FinFET having insulating layers between gate and source/drain contacts [patent_app_type] => utility [patent_app_number] => 16/150651 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 50 [patent_no_of_words] => 6927 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150651
FinFET having insulating layers between gate and source/drain contacts Oct 2, 2018 Issued
Array ( [id] => 15547905 [patent_doc_number] => 10573744 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-25 [patent_title] => Self-aligned, dual-gate LDMOS transistors and associated methods [patent_app_type] => utility [patent_app_number] => 16/150441 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 4848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150441 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150441
Self-aligned, dual-gate LDMOS transistors and associated methods Oct 2, 2018 Issued
Array ( [id] => 14184961 [patent_doc_number] => 20190112185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => REDUCING VIBRATION OF A MEMS INSTALLATION ON A PRINTED CIRCUIT BOARD [patent_app_type] => utility [patent_app_number] => 16/150479 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150479
REDUCING VIBRATION OF A MEMS INSTALLATION ON A PRINTED CIRCUIT BOARD Oct 2, 2018 Abandoned
Array ( [id] => 16132923 [patent_doc_number] => 10700233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Photodetector for detecting incoming infrared light [patent_app_type] => utility [patent_app_number] => 16/150921 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 6069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150921 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150921
Photodetector for detecting incoming infrared light Oct 2, 2018 Issued
Array ( [id] => 15503611 [patent_doc_number] => 20200051994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => MEMORY DEVICE IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 16/150652 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150652 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150652
MEMORY DEVICE IMPROVEMENT Oct 2, 2018 Abandoned
Array ( [id] => 13847947 [patent_doc_number] => 20190027458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => Method for manufacturing electronic device [patent_app_type] => utility [patent_app_number] => 16/142151 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16142151 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/142151
Method for manufacturing electronic device Sep 25, 2018 Abandoned
Array ( [id] => 15688009 [patent_doc_number] => 20200098668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-26 [patent_title] => THERMAL MANAGEMENT SOLUTIONS FOR EMBEDDED INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 16/141734 [patent_app_country] => US [patent_app_date] => 2018-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16141734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/141734
Thermal management solutions for embedded integrated circuit devices Sep 24, 2018 Issued
Array ( [id] => 15819651 [patent_doc_number] => 10635000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Semiconductor method of protecting wafer from bevel contamination [patent_app_type] => utility [patent_app_number] => 16/126033 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16126033 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/126033
Semiconductor method of protecting wafer from bevel contamination Sep 9, 2018 Issued
Array ( [id] => 15857737 [patent_doc_number] => 10644170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Metallization of conductive wires for solar cells [patent_app_type] => utility [patent_app_number] => 16/107892 [patent_app_country] => US [patent_app_date] => 2018-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 9552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16107892 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/107892
Metallization of conductive wires for solar cells Aug 20, 2018 Issued
Array ( [id] => 17638062 [patent_doc_number] => 11348795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Metal fill process for three-dimensional vertical NAND wordline [patent_app_type] => utility [patent_app_number] => 16/638430 [patent_app_country] => US [patent_app_date] => 2018-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 12965 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16638430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/638430
Metal fill process for three-dimensional vertical NAND wordline Aug 9, 2018 Issued
Array ( [id] => 14827753 [patent_doc_number] => 10410891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Cold fluid semiconductor device release during pick and place operations, and associated systems and methods [patent_app_type] => utility [patent_app_number] => 16/020625 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6313 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020625 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/020625
Cold fluid semiconductor device release during pick and place operations, and associated systems and methods Jun 26, 2018 Issued
Array ( [id] => 14671875 [patent_doc_number] => 10373857 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Backside stealth dicing through tape followed by front side laser ablation dicing process [patent_app_type] => utility [patent_app_number] => 16/017567 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 3946 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/017567
Backside stealth dicing through tape followed by front side laser ablation dicing process Jun 24, 2018 Issued
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