
Marcus E. Windrich
Examiner (ID: 900, Phone: (571)272-6417 , Office: P/3646 )
| Most Active Art Unit | 3646 |
| Art Unit(s) | 3646, 3619 |
| Total Applications | 906 |
| Issued Applications | 670 |
| Pending Applications | 85 |
| Abandoned Applications | 168 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20318137
[patent_doc_number] => 12456692
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-10-28
[patent_title] => Microelectronic package RDL patterns to reduce stress in RDLs across components
[patent_app_type] => utility
[patent_app_number] => 18/058991
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058991
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/058991 | Microelectronic package RDL patterns to reduce stress in RDLs across components | Nov 27, 2022 | Issued |
Array
(
[id] => 20375357
[patent_doc_number] => 12482801
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/994880
[patent_app_country] => US
[patent_app_date] => 2022-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 23
[patent_no_of_words] => 7622
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994880
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/994880 | Semiconductor package | Nov 27, 2022 | Issued |
Array
(
[id] => 18857447
[patent_doc_number] => 11855043
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-12-26
[patent_title] => Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates
[patent_app_type] => utility
[patent_app_number] => 17/994205
[patent_app_country] => US
[patent_app_date] => 2022-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 7894
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17994205
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/994205 | Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates | Nov 24, 2022 | Issued |
Array
(
[id] => 18679920
[patent_doc_number] => 20230317578
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/058436
[patent_app_country] => US
[patent_app_date] => 2022-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18058436
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/058436 | Semiconductor device and method for manufacturing semiconductor device | Nov 22, 2022 | Issued |
Array
(
[id] => 18199605
[patent_doc_number] => 20230053125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/978493
[patent_app_country] => US
[patent_app_date] => 2022-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5595
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978493
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/978493 | Electronic package and manufacturing method thereof | Oct 31, 2022 | Issued |
Array
(
[id] => 18366629
[patent_doc_number] => 20230148220
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-11
[patent_title] => SEMICONDUCTOR DEVICE PACKAGES
[patent_app_type] => utility
[patent_app_number] => 17/973690
[patent_app_country] => US
[patent_app_date] => 2022-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24060
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17973690
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/973690 | Semiconductor device packages | Oct 25, 2022 | Issued |
Array
(
[id] => 18958961
[patent_doc_number] => 20240047288
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-08
[patent_title] => ELECTRONIC DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/959314
[patent_app_country] => US
[patent_app_date] => 2022-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959314
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/959314 | Electronic device and manufacturing method thereof | Oct 3, 2022 | Issued |
Array
(
[id] => 20626177
[patent_doc_number] => 12593707
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-31
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/892137
[patent_app_country] => US
[patent_app_date] => 2022-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 21
[patent_no_of_words] => 1095
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892137
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/892137 | Semiconductor structure and manufacturing method thereof | Aug 21, 2022 | Issued |
Array
(
[id] => 20332855
[patent_doc_number] => 12463140
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Flexible interposer for semiconductor dies
[patent_app_type] => utility
[patent_app_number] => 17/821272
[patent_app_country] => US
[patent_app_date] => 2022-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 3223
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821272
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/821272 | Flexible interposer for semiconductor dies | Aug 21, 2022 | Issued |
Array
(
[id] => 18061683
[patent_doc_number] => 20220392770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-08
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, METHOD OF PROCESSING SUBSTRATE, AND RECORDING MEDIUM
[patent_app_type] => utility
[patent_app_number] => 17/891449
[patent_app_country] => US
[patent_app_date] => 2022-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11194
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891449
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/891449 | Method of manufacturing semiconductor device, substrate processing apparatus, method of processing substrate, and recording medium | Aug 18, 2022 | Issued |
Array
(
[id] => 18242656
[patent_doc_number] => 20230074967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-09
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/886997
[patent_app_country] => US
[patent_app_date] => 2022-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17345
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886997
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886997 | Display device | Aug 11, 2022 | Issued |
Array
(
[id] => 18040409
[patent_doc_number] => 20220384626
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => INSULATED GATE BIPOLAR TRANSISTOR AND DIODE
[patent_app_type] => utility
[patent_app_number] => 17/886097
[patent_app_country] => US
[patent_app_date] => 2022-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8230
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886097
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886097 | INSULATED GATE BIPOLAR TRANSISTOR AND DIODE | Aug 10, 2022 | Abandoned |
Array
(
[id] => 18857413
[patent_doc_number] => 11855008
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Stacking via structures for stress reduction
[patent_app_type] => utility
[patent_app_number] => 17/818729
[patent_app_country] => US
[patent_app_date] => 2022-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 22
[patent_no_of_words] => 7240
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818729
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/818729 | Stacking via structures for stress reduction | Aug 9, 2022 | Issued |
Array
(
[id] => 18857242
[patent_doc_number] => 11854835
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Heterogeneous bonding structure and method forming same
[patent_app_type] => utility
[patent_app_number] => 17/818747
[patent_app_country] => US
[patent_app_date] => 2022-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 7659
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17818747
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/818747 | Heterogeneous bonding structure and method forming same | Aug 9, 2022 | Issued |
Array
(
[id] => 18645639
[patent_doc_number] => 11769718
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Packages with Si-substrate-free interposer and method forming same
[patent_app_type] => utility
[patent_app_number] => 17/815421
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 35
[patent_no_of_words] => 8605
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815421
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/815421 | Packages with Si-substrate-free interposer and method forming same | Jul 26, 2022 | Issued |
Array
(
[id] => 18833864
[patent_doc_number] => 20230402391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/814527
[patent_app_country] => US
[patent_app_date] => 2022-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4553
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814527
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814527 | Package structure and manufacturing method thereof | Jul 23, 2022 | Issued |
Array
(
[id] => 19487241
[patent_doc_number] => 12106965
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-01
[patent_title] => Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures
[patent_app_type] => utility
[patent_app_number] => 17/870931
[patent_app_country] => US
[patent_app_date] => 2022-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8503
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17870931
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/870931 | Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures | Jul 21, 2022 | Issued |
Array
(
[id] => 20111510
[patent_doc_number] => 12362246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-15
[patent_title] => Interposer including stepped surfaces and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/871375
[patent_app_country] => US
[patent_app_date] => 2022-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 4518
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871375
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/871375 | Interposer including stepped surfaces and methods of forming the same | Jul 21, 2022 | Issued |
Array
(
[id] => 19627176
[patent_doc_number] => 12166025
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Semiconductor devices and methods of manufacturing
[patent_app_type] => utility
[patent_app_number] => 17/813873
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 33
[patent_no_of_words] => 12887
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813873
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813873 | Semiconductor devices and methods of manufacturing | Jul 19, 2022 | Issued |
Array
(
[id] => 17985946
[patent_doc_number] => 20220351983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => BUMP STRUCTURE AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/865305
[patent_app_country] => US
[patent_app_date] => 2022-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9175
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865305
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/865305 | Bump structure and method of making the same | Jul 13, 2022 | Issued |