Search

Marcus Smith

Examiner (ID: 7124, Phone: (571)270-1096 , Office: P/2467 )

Most Active Art Unit
2467
Art Unit(s)
2616, 2468, 2419, 2467, 2619
Total Applications
664
Issued Applications
499
Pending Applications
20
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20431152 [patent_doc_number] => 20250393246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-25 [patent_title] => SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN PATTERN HAVING DIFFERENT GERMANIUM CONCENTRATIONS [patent_app_type] => utility [patent_app_number] => 18/960928 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5291 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18960928 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/960928
SEMICONDUCTOR DEVICE WITH SOURCE/DRAIN PATTERN HAVING DIFFERENT GERMANIUM CONCENTRATIONS Nov 25, 2024 Pending
Array ( [id] => 19484117 [patent_doc_number] => 20240332159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/733459 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/733459
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Jun 3, 2024 Pending
Array ( [id] => 20307240 [patent_doc_number] => 12453251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Display apparatus [patent_app_type] => utility [patent_app_number] => 18/665649 [patent_app_country] => US [patent_app_date] => 2024-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9374 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18665649 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/665649
Display apparatus May 15, 2024 Issued
Array ( [id] => 19392906 [patent_doc_number] => 20240282776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR STRUCTURE INCLUDING SECTIONED WELL REGION [patent_app_type] => utility [patent_app_number] => 18/653473 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653473 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653473
Semiconductor structure including sectioned well region May 1, 2024 Issued
Array ( [id] => 19364383 [patent_doc_number] => 20240266417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => NEGATIVE CAPACITANCE TRANSISTOR WITH EXTERNAL FERROELECTRIC STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/635461 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635461
NEGATIVE CAPACITANCE TRANSISTOR WITH EXTERNAL FERROELECTRIC STRUCTURE Apr 14, 2024 Pending
Array ( [id] => 19531811 [patent_doc_number] => 20240355713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/589156 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589156 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/589156
SEMICONDUCTOR DEVICE Feb 26, 2024 Pending
Array ( [id] => 20268645 [patent_doc_number] => 12439657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Confined source/drain epitaxy regions and method forming same [patent_app_type] => utility [patent_app_number] => 18/589160 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 2167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18589160 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/589160
Confined source/drain epitaxy regions and method forming same Feb 26, 2024 Issued
Array ( [id] => 20028852 [patent_doc_number] => 20250167074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => PASSIVE THERMAL CONTROL LAYER FOR INTEGRATED DEVICE [patent_app_type] => utility [patent_app_number] => 18/582781 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582781
PASSIVE THERMAL CONTROL LAYER FOR INTEGRATED DEVICE Feb 20, 2024 Pending
Array ( [id] => 19351371 [patent_doc_number] => 20240260335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/421245 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18211 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421245 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421245
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME Jan 23, 2024 Pending
Array ( [id] => 20418465 [patent_doc_number] => 12501771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Display device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/418174 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 9331 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18418174 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/418174
Display device and method of manufacturing the same Jan 18, 2024 Issued
Array ( [id] => 19337122 [patent_doc_number] => 20240251552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => NAND STAIRCASE LANDING PADS CONVERSION [patent_app_type] => utility [patent_app_number] => 18/417709 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/417709
NAND STAIRCASE LANDING PADS CONVERSION Jan 18, 2024 Pending
Array ( [id] => 19161116 [patent_doc_number] => 20240153823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => Gate Structures in Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/416073 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10035 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416073 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416073
Gate structures in semiconductor devices Jan 17, 2024 Issued
Array ( [id] => 19306054 [patent_doc_number] => 20240234634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/396464 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396464 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396464
DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE Dec 25, 2023 Pending
Array ( [id] => 19509496 [patent_doc_number] => 12120938 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-10-15 [patent_title] => Methods of fabricating OLED panel with inorganic pixel encapsulating barrier [patent_app_type] => utility [patent_app_number] => 18/390720 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 43 [patent_no_of_words] => 9456 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18390720 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/390720
Methods of fabricating OLED panel with inorganic pixel encapsulating barrier Dec 19, 2023 Issued
Array ( [id] => 19919819 [patent_doc_number] => 12295215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Methods of fabricating OLED panel with inorganic pixel encapsulating barrier [patent_app_type] => utility [patent_app_number] => 18/545676 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 43 [patent_no_of_words] => 4272 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545676 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545676
Methods of fabricating OLED panel with inorganic pixel encapsulating barrier Dec 18, 2023 Issued
Array ( [id] => 19823264 [patent_doc_number] => 20250081471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/543694 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18543694 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/543694
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Dec 17, 2023 Pending
Array ( [id] => 19255155 [patent_doc_number] => 20240206152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => HYBRID GATE DIELECTRIC ACCESS DEVICE FOR VERTICAL THREE-DIMENSIONAL MEMORY [patent_app_type] => utility [patent_app_number] => 18/542299 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542299 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542299
HYBRID GATE DIELECTRIC ACCESS DEVICE FOR VERTICAL THREE-DIMENSIONAL MEMORY Dec 14, 2023 Pending
Array ( [id] => 19071410 [patent_doc_number] => 20240105836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/537822 [patent_app_country] => US [patent_app_date] => 2023-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537822 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537822
Semiconductor device Dec 12, 2023 Issued
Array ( [id] => 20734814 [patent_doc_number] => 12642082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Cutting structure, semiconductor device comprising the same, and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/536622 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 4357 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536622 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536622
Cutting structure, semiconductor device comprising the same, and method for fabricating the same Dec 11, 2023 Issued
Array ( [id] => 19252887 [patent_doc_number] => 20240203884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/532144 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/532144
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Dec 6, 2023 Pending
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