Search

Marcus Smith

Examiner (ID: 7124, Phone: (571)270-1096 , Office: P/2467 )

Most Active Art Unit
2467
Art Unit(s)
2616, 2468, 2419, 2467, 2619
Total Applications
664
Issued Applications
499
Pending Applications
20
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15656931 [patent_doc_number] => 20200090996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-19 [patent_title] => METHOD OF FORMING A CONTACT PLUG OF A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 16/216845 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216845 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216845
METHOD OF FORMING A CONTACT PLUG OF A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Dec 10, 2018 Abandoned
Array ( [id] => 14446321 [patent_doc_number] => 20190181034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => SELECTIVE FORMATION OF METALLIC FILMS ON METALLIC SURFACES [patent_app_type] => utility [patent_app_number] => 16/213479 [patent_app_country] => US [patent_app_date] => 2018-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16213479 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/213479
Selective formation of metallic films on metallic surfaces Dec 6, 2018 Issued
Array ( [id] => 16479639 [patent_doc_number] => 10854593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Semiconductor device and layout thereof [patent_app_type] => utility [patent_app_number] => 16/206746 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206746
Semiconductor device and layout thereof Nov 29, 2018 Issued
Array ( [id] => 16509530 [patent_doc_number] => 20200388786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => ELECTRONIC DEVICE MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 16/764582 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16764582 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/764582
ELECTRONIC DEVICE MANUFACTURING METHOD Nov 28, 2018 Abandoned
Array ( [id] => 15031111 [patent_doc_number] => 20190326560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/203784 [patent_app_country] => US [patent_app_date] => 2018-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203784 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203784
Display device and manufacturing method thereof Nov 28, 2018 Issued
Array ( [id] => 14110263 [patent_doc_number] => 20190096807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => METHOD OF FABRICATING INTEGRATED CIRCUIT HAVING STAGGERED CONDUCTIVE FEATURES [patent_app_type] => utility [patent_app_number] => 16/202922 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5725 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16202922 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/202922
Method of fabricating integrated circuit having staggered conductive features Nov 27, 2018 Issued
Array ( [id] => 17530191 [patent_doc_number] => 11302892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Display substrate and manufacture method thereof, and display device [patent_app_type] => utility [patent_app_number] => 16/604304 [patent_app_country] => US [patent_app_date] => 2018-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 10301 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16604304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/604304
Display substrate and manufacture method thereof, and display device Nov 22, 2018 Issued
Array ( [id] => 14079549 [patent_doc_number] => 20190088662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/196197 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196197 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196197
Semiconductor device and method for fabricating the same Nov 19, 2018 Issued
Array ( [id] => 15807717 [patent_doc_number] => 20200127001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => METHODS FOR FORMING MULTI-DIVISION STAIRCASE STRUCTURE OF THREE-DIMENSIONAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/195852 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195852
Methods for forming multi-division staircase structure of three-dimensional memory device Nov 19, 2018 Issued
Array ( [id] => 15776049 [patent_doc_number] => 20200119042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => METHOD FOR FORMING CHANNEL HOLE IN THREE-DIMENSIONAL MEMORY DEVICE USING NONCONFORMAL SACRIFICIAL LAYER [patent_app_type] => utility [patent_app_number] => 16/195855 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16195855 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/195855
Method for forming channel hole in three-dimensional memory device using nonconformal sacrificial layer Nov 19, 2018 Issued
Array ( [id] => 14080013 [patent_doc_number] => 20190088894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/196024 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196024 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196024
Display device Nov 19, 2018 Issued
Array ( [id] => 17247456 [patent_doc_number] => 20210367201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => THIN FILM PACKAGING STRUCTURE, THIN FILM PACKAGING METHOD AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/342994 [patent_app_country] => US [patent_app_date] => 2018-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16342994 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/342994
THIN FILM PACKAGING STRUCTURE, THIN FILM PACKAGING METHOD AND DISPLAY PANEL Nov 18, 2018 Abandoned
Array ( [id] => 15260353 [patent_doc_number] => 20190378910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR SAME [patent_app_type] => utility [patent_app_number] => 16/191456 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191456
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR SAME Nov 14, 2018 Abandoned
Array ( [id] => 15984931 [patent_doc_number] => 10672805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Method for making micro LED display panel and pixel driving circuit of same [patent_app_type] => utility [patent_app_number] => 16/191474 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4692 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191474 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191474
Method for making micro LED display panel and pixel driving circuit of same Nov 14, 2018 Issued
Array ( [id] => 17278265 [patent_doc_number] => 20210384463 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE [patent_app_type] => utility [patent_app_number] => 16/498007 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16498007 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/498007
DISPLAY PANEL, MANUFACTURING METHOD THEREOF AND DISPLAY MODULE Nov 14, 2018 Abandoned
Array ( [id] => 14382597 [patent_doc_number] => 20190165211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => METHOD FOR PRODUCING CORE/SHELL NANOPARTICLES AND CORE/SHELL NANOPARTICLES [patent_app_type] => utility [patent_app_number] => 16/192230 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16192230 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/192230
METHOD FOR PRODUCING CORE/SHELL NANOPARTICLES AND CORE/SHELL NANOPARTICLES Nov 14, 2018 Abandoned
Array ( [id] => 15922287 [patent_doc_number] => 10658392 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-05-19 [patent_title] => Micro light-emitting diode display device and micro light-emitting diode driving circuit thereof [patent_app_type] => utility [patent_app_number] => 16/191470 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7134 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191470
Micro light-emitting diode display device and micro light-emitting diode driving circuit thereof Nov 14, 2018 Issued
Array ( [id] => 15260347 [patent_doc_number] => 20190378907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => TRANSISTOR GATE STRUCTURE, AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 16/191461 [patent_app_country] => US [patent_app_date] => 2018-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4001 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16191461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/191461
TRANSISTOR GATE STRUCTURE, AND MANUFACTURING METHOD THEREFOR Nov 14, 2018 Abandoned
Array ( [id] => 14644271 [patent_doc_number] => 10366884 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-30 [patent_title] => Methods for forming a germanium island using selective epitaxial growth and a sacrificial filling layer [patent_app_type] => utility [patent_app_number] => 16/184984 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 6845 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184984 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184984
Methods for forming a germanium island using selective epitaxial growth and a sacrificial filling layer Nov 7, 2018 Issued
Array ( [id] => 14024781 [patent_doc_number] => 20190074384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => THIN FILM TRANSISTOR, MANUFACTURING PROCESS FOR THIN FILM TRANSISTOR, AND LASER ANNEALING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/183424 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183424 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183424
Thin film transistor, manufacturing process for thin film transistor, and laser annealing apparatus Nov 6, 2018 Issued
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