Search

Marcus Smith

Examiner (ID: 7124, Phone: (571)270-1096 , Office: P/2467 )

Most Active Art Unit
2467
Art Unit(s)
2616, 2468, 2419, 2467, 2619
Total Applications
664
Issued Applications
499
Pending Applications
20
Abandoned Applications
148

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10845035 [patent_doc_number] => 08872214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Rod-like light-emitting device, method of manufacturing rod-like light-emitting device, backlight, illuminating device, and display device' [patent_app_type] => utility [patent_app_number] => 12/904773 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 127 [patent_figures_cnt] => 215 [patent_no_of_words] => 89576 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904773 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904773
Rod-like light-emitting device, method of manufacturing rod-like light-emitting device, backlight, illuminating device, and display device Oct 13, 2010 Issued
Array ( [id] => 8133747 [patent_doc_number] => 20120091418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-19 [patent_title] => 'BIPOLAR STORAGE ELEMENTS FOR USE IN MEMORY CELLS AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/904770 [patent_app_country] => US [patent_app_date] => 2010-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 16003 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20120091418.pdf [firstpage_image] =>[orig_patent_app_number] => 12904770 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/904770
BIPOLAR STORAGE ELEMENTS FOR USE IN MEMORY CELLS AND METHODS OF FORMING THE SAME Oct 13, 2010 Abandoned
Array ( [id] => 5980310 [patent_doc_number] => 20110095420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/923885 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3207 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095420.pdf [firstpage_image] =>[orig_patent_app_number] => 12923885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923885
Semiconductor device and method of manufacturing semiconductor device Oct 12, 2010 Issued
Array ( [id] => 6036475 [patent_doc_number] => 20110089524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-21 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/903386 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8153 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20110089524.pdf [firstpage_image] =>[orig_patent_app_number] => 12903386 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903386
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 12, 2010 Abandoned
Array ( [id] => 5980218 [patent_doc_number] => 20110095385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND WIRELESS TRANSMISSION SYSTEM UTILIZING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/903336 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20290 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095385.pdf [firstpage_image] =>[orig_patent_app_number] => 12903336 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903336
Semiconductor device, method of manufacturing the same, and wireless transmission system utilizing the same Oct 12, 2010 Issued
Array ( [id] => 6120686 [patent_doc_number] => 20110084300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'LIGHT EMITTING DIODE DEVICE, LIGHT EMITTING APPARATUS AND METHOD OF MANUFACTURING LIGHT EMITTING DIODE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/903911 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3614 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084300.pdf [firstpage_image] =>[orig_patent_app_number] => 12903911 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903911
Light emitting diode device, light emitting apparatus and method of manufacturing light emitting diode device Oct 12, 2010 Issued
Array ( [id] => 8664950 [patent_doc_number] => 08378412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Memory arrays where a distance between adjacent memory cells at one end of a substantially vertical portion is greater than a distance between adjacent memory cells at an opposing end of the substantially vertical portion and formation thereof' [patent_app_type] => utility [patent_app_number] => 12/903264 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 10601 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12903264 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903264
Memory arrays where a distance between adjacent memory cells at one end of a substantially vertical portion is greater than a distance between adjacent memory cells at an opposing end of the substantially vertical portion and formation thereof Oct 12, 2010 Issued
Array ( [id] => 7506646 [patent_doc_number] => 20110254061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'TRANSISTOR AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/903220 [patent_app_country] => US [patent_app_date] => 2010-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5989 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254061.pdf [firstpage_image] =>[orig_patent_app_number] => 12903220 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/903220
Transistor and method of fabricating the same Oct 12, 2010 Issued
Array ( [id] => 8725444 [patent_doc_number] => 08404560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Devices with gate-to-gate isolation structures and methods of manufacture' [patent_app_type] => utility [patent_app_number] => 12/902776 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 6821 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12902776 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/902776
Devices with gate-to-gate isolation structures and methods of manufacture Oct 11, 2010 Issued
Array ( [id] => 8123017 [patent_doc_number] => 20120086055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-12 [patent_title] => 'DEVICES WITH GATE-TO-GATE ISOLATION STRUCTURES AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/902793 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6804 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20120086055.pdf [firstpage_image] =>[orig_patent_app_number] => 12902793 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/902793
Devices with gate-to-gate isolation structures and methods of manufacture Oct 11, 2010 Issued
Array ( [id] => 9497073 [patent_doc_number] => 08735895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Electronic device including graphene thin film and methods of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/902783 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 8078 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12902783 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/902783
Electronic device including graphene thin film and methods of fabricating the same Oct 11, 2010 Issued
Array ( [id] => 6058751 [patent_doc_number] => 20110198603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-18 [patent_title] => 'THIN FILM TRANSISTOR AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/902786 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5032 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20110198603.pdf [firstpage_image] =>[orig_patent_app_number] => 12902786 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/902786
Thin film transistor and method of forming the same Oct 11, 2010 Issued
Array ( [id] => 8846151 [patent_doc_number] => 08455330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Devices with gate-to-gate isolation structures and methods of manufacture' [patent_app_type] => utility [patent_app_number] => 12/902803 [patent_app_country] => US [patent_app_date] => 2010-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 6699 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12902803 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/902803
Devices with gate-to-gate isolation structures and methods of manufacture Oct 11, 2010 Issued
Array ( [id] => 5993074 [patent_doc_number] => 20110014727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-20 [patent_title] => 'THIN FILM PROBE SHEET AND SEMICONDUCTOR CHIP INSPECTION SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/883982 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13881 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20110014727.pdf [firstpage_image] =>[orig_patent_app_number] => 12883982 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883982
THIN FILM PROBE SHEET AND SEMICONDUCTOR CHIP INSPECTION SYSTEM Sep 15, 2010 Abandoned
Array ( [id] => 6161361 [patent_doc_number] => 20110193200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'SEMICONDUCTOR WAFER CHIP SCALE PACKAGE TEST FLOW AND DICING PROCESS' [patent_app_type] => utility [patent_app_number] => 12/881845 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4147 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193200.pdf [firstpage_image] =>[orig_patent_app_number] => 12881845 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881845
SEMICONDUCTOR WAFER CHIP SCALE PACKAGE TEST FLOW AND DICING PROCESS Sep 13, 2010 Abandoned
Array ( [id] => 7535088 [patent_doc_number] => 08048712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Method for producing localized patterns' [patent_app_type] => utility [patent_app_number] => 12/879473 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2633 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/048/08048712.pdf [firstpage_image] =>[orig_patent_app_number] => 12879473 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879473
Method for producing localized patterns Sep 9, 2010 Issued
Array ( [id] => 10004088 [patent_doc_number] => 09048186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Methods for forming integrated circuits' [patent_app_type] => utility [patent_app_number] => 12/879371 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3627 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12879371 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879371
Methods for forming integrated circuits Sep 9, 2010 Issued
Array ( [id] => 6007558 [patent_doc_number] => 20110059589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-10 [patent_title] => 'METHOD FOR PRODUCING A FIELD EFFECT DEVICE HAVING SELF-ALIGNED ELECTRICAL CONNECTIONS WITH RESPECT TO THE GATE ELECTRODE' [patent_app_type] => utility [patent_app_number] => 12/879572 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6385 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20110059589.pdf [firstpage_image] =>[orig_patent_app_number] => 12879572 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879572
Method for producing a field effect device having self-aligned electrical connections with respect to the gate electrode Sep 9, 2010 Issued
Array ( [id] => 7818093 [patent_doc_number] => 20120064713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'Ultra-low-k dual damascene structure and method of fabricating' [patent_app_type] => utility [patent_app_number] => 12/879745 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 14913 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20120064713.pdf [firstpage_image] =>[orig_patent_app_number] => 12879745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879745
Ultra-low-k dual damascene structure and method of fabricating Sep 9, 2010 Abandoned
Array ( [id] => 6126766 [patent_doc_number] => 20110086450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'METHOD OF MANUFACTURING THIN FILM TRANSISTOR ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/878737 [patent_app_country] => US [patent_app_date] => 2010-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4050 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20110086450.pdf [firstpage_image] =>[orig_patent_app_number] => 12878737 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/878737
Method of manufacturing thin film transistor array substrate Sep 8, 2010 Issued
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