Search

Mardochee Chery

Examiner (ID: 2693, Phone: (571)272-4246 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2133, 2188, 2186
Total Applications
1111
Issued Applications
937
Pending Applications
78
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17643965 [patent_doc_number] => 20220171703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => METADATA AWARE COPYBACK FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/676595 [patent_app_country] => US [patent_app_date] => 2022-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17676595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/676595
Metadata aware copyback for memory devices Feb 20, 2022 Issued
Array ( [id] => 19375683 [patent_doc_number] => 12067253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Opportunistic background data integrity scans [patent_app_type] => utility [patent_app_number] => 17/666087 [patent_app_country] => US [patent_app_date] => 2022-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666087 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666087
Opportunistic background data integrity scans Feb 6, 2022 Issued
Array ( [id] => 18079401 [patent_doc_number] => 20220405013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => ASYNCHRONOUS INTERRUPT EVENT HANDLING IN MULTI-PLANE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/589080 [patent_app_country] => US [patent_app_date] => 2022-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17589080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/589080
Asynchronous interrupt event handling in multi-plane memory devices Jan 30, 2022 Issued
Array ( [id] => 18912079 [patent_doc_number] => 11875058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Data storage device and non-volatile memory control method [patent_app_type] => utility [patent_app_number] => 17/648679 [patent_app_country] => US [patent_app_date] => 2022-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4389 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648679 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648679
Data storage device and non-volatile memory control method Jan 23, 2022 Issued
Array ( [id] => 18316509 [patent_doc_number] => 11630590 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-18 [patent_title] => Method and apparatus for performing access control of memory device with aid of aggressor bit information [patent_app_type] => utility [patent_app_number] => 17/572635 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14410 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 362 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572635 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572635
Method and apparatus for performing access control of memory device with aid of aggressor bit information Jan 10, 2022 Issued
Array ( [id] => 18499126 [patent_doc_number] => 20230221867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => COMPUTATIONAL ACCELERATION FOR DISTRIBUTED CACHE [patent_app_type] => utility [patent_app_number] => 17/571922 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17571922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/571922
Computational acceleration for distributed cache Jan 9, 2022 Issued
Array ( [id] => 18454060 [patent_doc_number] => 20230195340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => SIMPLIFIED RAID IMPLEMENTATION FOR BYTE-ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 17/558260 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558260
Simplified raid implementation for byte-addressable memory Dec 20, 2021 Issued
Array ( [id] => 17535496 [patent_doc_number] => 20220114105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => COHERENT ACCELERATOR FABRIC CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/555789 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555789 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555789
Bias-based coherency in an interconnect fabric Dec 19, 2021 Issued
Array ( [id] => 18873406 [patent_doc_number] => 11861216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Data recovery using barrier commands [patent_app_type] => utility [patent_app_number] => 17/645184 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 20058 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645184
Data recovery using barrier commands Dec 19, 2021 Issued
Array ( [id] => 19122643 [patent_doc_number] => 11966632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Reading sequential data using mapping information stored at a host device [patent_app_type] => utility [patent_app_number] => 17/556066 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 21037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17556066 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/556066
Reading sequential data using mapping information stored at a host device Dec 19, 2021 Issued
Array ( [id] => 18087197 [patent_doc_number] => 11537329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-27 [patent_title] => Emulation test system for flash translation layer and method thereof [patent_app_type] => utility [patent_app_number] => 17/555130 [patent_app_country] => US [patent_app_date] => 2021-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7759 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17555130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/555130
Emulation test system for flash translation layer and method thereof Dec 16, 2021 Issued
Array ( [id] => 18856007 [patent_doc_number] => 11853590 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Read threshold estimation system using calculations based on polynomial regression [patent_app_type] => utility [patent_app_number] => 17/541039 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 15838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17541039 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/541039
Read threshold estimation system using calculations based on polynomial regression Dec 1, 2021 Issued
Array ( [id] => 18407487 [patent_doc_number] => 20230168840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => HYBRID SOLID-STATE DRIVE [patent_app_type] => utility [patent_app_number] => 17/538871 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538871 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538871
Hybrid solid-state drive Nov 29, 2021 Issued
Array ( [id] => 18826518 [patent_doc_number] => 11841794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Memory sub-system write sequence track [patent_app_type] => utility [patent_app_number] => 17/536928 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9581 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536928
Memory sub-system write sequence track Nov 28, 2021 Issued
Array ( [id] => 17675079 [patent_doc_number] => 20220188246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => EXCLUSION REGIONS FOR HOST-SIDE MEMORY ADDRESS TRANSLATION [patent_app_type] => utility [patent_app_number] => 17/531581 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531581 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/531581
Exclusion regions for host-side memory address translation Nov 18, 2021 Issued
Array ( [id] => 18377908 [patent_doc_number] => 20230152995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => BLOCK BUDGET ENHANCEMENT MECHANISMS FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/530056 [patent_app_country] => US [patent_app_date] => 2021-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17530056 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/530056
Block budget enhancement mechanisms for memory Nov 17, 2021 Issued
Array ( [id] => 17853678 [patent_doc_number] => 20220283720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => STORAGE CONTROLLER REDIRECTING WRITE OPERATION AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/526243 [patent_app_country] => US [patent_app_date] => 2021-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17526243 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/526243
Storage controller redirecting write operation and operating method thereof Nov 14, 2021 Issued
Array ( [id] => 17430234 [patent_doc_number] => 20220057943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => UNAUTHORIZED ACCESS COMMAND LOGGING FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/453787 [patent_app_country] => US [patent_app_date] => 2021-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453787 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453787
Unauthorized access command logging for memory Nov 4, 2021 Issued
Array ( [id] => 18546934 [patent_doc_number] => 11720286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Extended cross-temperature handling in a memory sub-system [patent_app_type] => utility [patent_app_number] => 17/516009 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17516009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/516009
Extended cross-temperature handling in a memory sub-system Oct 31, 2021 Issued
Array ( [id] => 18462964 [patent_doc_number] => 11687252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Non-volatile memory with pre-trained model and inference circuit [patent_app_type] => utility [patent_app_number] => 17/503612 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 19781 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503612 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/503612
Non-volatile memory with pre-trained model and inference circuit Oct 17, 2021 Issued
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