
Mardochee Chery
Examiner (ID: 2693, Phone: (571)272-4246 , Office: P/2133 )
| Most Active Art Unit | 2133 |
| Art Unit(s) | 2133, 2188, 2186 |
| Total Applications | 1111 |
| Issued Applications | 937 |
| Pending Applications | 78 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14234923
[patent_doc_number] => 20190129634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-02
[patent_title] => METHOD AND APPARATUS FOR TRIGGERING RAID RECONSTRUCTION
[patent_app_type] => utility
[patent_app_number] => 16/234618
[patent_app_country] => US
[patent_app_date] => 2018-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4473
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16234618
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/234618 | Method and apparatus for triggering raid reconstruction | Dec 27, 2018 | Issued |
Array
(
[id] => 16171382
[patent_doc_number] => 10712946
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-14
[patent_title] => Hybrid drive caching in a backup system with SSD deletion management
[patent_app_type] => utility
[patent_app_number] => 16/235688
[patent_app_country] => US
[patent_app_date] => 2018-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 34498
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16235688
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/235688 | Hybrid drive caching in a backup system with SSD deletion management | Dec 27, 2018 | Issued |
Array
(
[id] => 16116111
[patent_doc_number] => 20200210078
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => UNAUTHORIZED ACCESS COMMAND LOGGING FOR MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/235482
[patent_app_country] => US
[patent_app_date] => 2018-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7294
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16235482
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/235482 | Unauthorized access command logging using a key for a protected region of memory | Dec 27, 2018 | Issued |
Array
(
[id] => 16095125
[patent_doc_number] => 20200201549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-25
[patent_title] => DYNAMIC PERFORMANCE DENSITY TUNING FOR DATA STORAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/231748
[patent_app_country] => US
[patent_app_date] => 2018-12-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9621
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16231748
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/231748 | Dynamic performance density tuning for data storage device | Dec 23, 2018 | Issued |
Array
(
[id] => 14720385
[patent_doc_number] => 20190251256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-15
[patent_title] => SECURE PRIVILEGE LEVEL EXECUTION AND ACCESS PROTECTION
[patent_app_type] => utility
[patent_app_number] => 16/228719
[patent_app_country] => US
[patent_app_date] => 2018-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228719
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/228719 | SECURE PRIVILEGE LEVEL EXECUTION AND ACCESS PROTECTION | Dec 19, 2018 | Abandoned |
Array
(
[id] => 16758633
[patent_doc_number] => 10977183
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-13
[patent_title] => Processing a sequence of translation entry invalidation requests with regard to draining a processor core
[patent_app_type] => utility
[patent_app_number] => 16/216705
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 16
[patent_no_of_words] => 11605
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216705
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/216705 | Processing a sequence of translation entry invalidation requests with regard to draining a processor core | Dec 10, 2018 | Issued |
Array
(
[id] => 16706139
[patent_doc_number] => 10956070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-23
[patent_title] => Zeroing a memory block without processor caching
[patent_app_type] => utility
[patent_app_number] => 16/216587
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8895
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216587
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/216587 | Zeroing a memory block without processor caching | Dec 10, 2018 | Issued |
Array
(
[id] => 15889047
[patent_doc_number] => 10650872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-12
[patent_title] => Memory component with multiple command/address sampling modes
[patent_app_type] => utility
[patent_app_number] => 16/215573
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 34
[patent_no_of_words] => 26507
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215573
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215573 | Memory component with multiple command/address sampling modes | Dec 9, 2018 | Issued |
Array
(
[id] => 15998121
[patent_doc_number] => 20200174931
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-04
[patent_title] => SELECTIVELY PREVENTING PRE-COHERENCE POINT READS IN A CACHE HIERARCHY TO REDUCE BARRIER OVERHEAD
[patent_app_type] => utility
[patent_app_number] => 16/209604
[patent_app_country] => US
[patent_app_date] => 2018-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13367
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209604
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/209604 | Selectively preventing pre-coherence point reads in a cache hierarchy to reduce barrier overhead | Dec 3, 2018 | Issued |
Array
(
[id] => 14411461
[patent_doc_number] => 20190171574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-06
[patent_title] => MULTI-CORE PROCESSOR WITH SOFTWARE-HARDWARE CO-MANAGED CACHE SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/209795
[patent_app_country] => US
[patent_app_date] => 2018-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4063
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209795
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/209795 | Method and apparatus for co-managed cache system | Dec 3, 2018 | Issued |
Array
(
[id] => 15997627
[patent_doc_number] => 20200174684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-04
[patent_title] => MAPPED REDUNDANT ARRAY OF INDEPENDENT NODES FOR DATA STORAGE WITH HIGH PERFORMANCE
[patent_app_type] => utility
[patent_app_number] => 16/209185
[patent_app_country] => US
[patent_app_date] => 2018-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8674
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16209185
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/209185 | Mapped redundant array of independent nodes for data storage with high performance using logical columns of the nodes with different widths and different positioning patterns | Dec 3, 2018 | Issued |
Array
(
[id] => 15387051
[patent_doc_number] => 10534711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Application cache replication to secondary application(s)
[patent_app_type] => utility
[patent_app_number] => 16/204778
[patent_app_country] => US
[patent_app_date] => 2018-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6414
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204778
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/204778 | Application cache replication to secondary application(s) | Nov 28, 2018 | Issued |
Array
(
[id] => 15387051
[patent_doc_number] => 10534711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Application cache replication to secondary application(s)
[patent_app_type] => utility
[patent_app_number] => 16/204778
[patent_app_country] => US
[patent_app_date] => 2018-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6414
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204778
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/204778 | Application cache replication to secondary application(s) | Nov 28, 2018 | Issued |
Array
(
[id] => 15387051
[patent_doc_number] => 10534711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Application cache replication to secondary application(s)
[patent_app_type] => utility
[patent_app_number] => 16/204778
[patent_app_country] => US
[patent_app_date] => 2018-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6414
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204778
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/204778 | Application cache replication to secondary application(s) | Nov 28, 2018 | Issued |
Array
(
[id] => 15387051
[patent_doc_number] => 10534711
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Application cache replication to secondary application(s)
[patent_app_type] => utility
[patent_app_number] => 16/204778
[patent_app_country] => US
[patent_app_date] => 2018-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6414
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16204778
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/204778 | Application cache replication to secondary application(s) | Nov 28, 2018 | Issued |
Array
(
[id] => 15952589
[patent_doc_number] => 10664199
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-05-26
[patent_title] => Application driven hardware cache management
[patent_app_type] => utility
[patent_app_number] => 16/188950
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 11791
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16188950
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/188950 | Application driven hardware cache management | Nov 12, 2018 | Issued |
Array
(
[id] => 16758380
[patent_doc_number] => 10976928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-04-13
[patent_title] => Remove-on-delete technologies for solid state drive optimization
[patent_app_type] => utility
[patent_app_number] => 16/186652
[patent_app_country] => US
[patent_app_date] => 2018-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4022
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186652
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/186652 | Remove-on-delete technologies for solid state drive optimization | Nov 11, 2018 | Issued |
Array
(
[id] => 14022283
[patent_doc_number] => 20190073135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-07
[patent_title] => LOW-COST STORAGE-ALLOCATION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/181968
[patent_app_country] => US
[patent_app_date] => 2018-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8806
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 321
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181968
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/181968 | Low-cost storage-allocation system | Nov 5, 2018 | Issued |
Array
(
[id] => 14076411
[patent_doc_number] => 20190087093
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-21
[patent_title] => COMPUTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/181551
[patent_app_country] => US
[patent_app_date] => 2018-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10131
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181551
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/181551 | Computing device | Nov 5, 2018 | Issued |
Array
(
[id] => 15836603
[patent_doc_number] => 20200133584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => SUPPORTING NON-DISRUPTIVE MOVEMENT OF A LOGICAL VOLUME OF NON-VOLATILE DATA STORAGE BETWEEN STORAGE APPLIANCES
[patent_app_type] => utility
[patent_app_number] => 16/176819
[patent_app_country] => US
[patent_app_date] => 2018-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10658
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 401
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16176819
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/176819 | Supporting non-disruptive movement of a logical volume of non-volatile data storage between storage appliances | Oct 30, 2018 | Issued |