Search

Mardochee Chery

Examiner (ID: 2693, Phone: (571)272-4246 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2133, 2188, 2186
Total Applications
1111
Issued Applications
937
Pending Applications
78
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19212661 [patent_doc_number] => 12001724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Forwarding operations to bypass persistent memory [patent_app_type] => utility [patent_app_number] => 18/089633 [patent_app_country] => US [patent_app_date] => 2022-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 20293 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089633
Forwarding operations to bypass persistent memory Dec 27, 2022 Issued
Array ( [id] => 18934315 [patent_doc_number] => 11886749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Interrupt mode or polling mode for memory devices [patent_app_type] => utility [patent_app_number] => 18/089010 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 17376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/089010
Interrupt mode or polling mode for memory devices Dec 26, 2022 Issued
Array ( [id] => 19267457 [patent_doc_number] => 20240211160 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => System Memory Training with Chipset Attached Memory [patent_app_type] => utility [patent_app_number] => 18/146929 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146929
System memory training with chipset attached memory Dec 26, 2022 Issued
Array ( [id] => 19267431 [patent_doc_number] => 20240211134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => ACCELERATING RELAXED REMOTE ATOMICS ON MULTIPLE WRITER OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/087964 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18087964 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/087964
Accelerating relaxed remote atomics on multiple writer operations Dec 22, 2022 Issued
Array ( [id] => 19015089 [patent_doc_number] => 11922021 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Arrangements for storing more data in memory when using a hierarchical memory structure [patent_app_type] => utility [patent_app_number] => 18/068253 [patent_app_country] => US [patent_app_date] => 2022-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 67 [patent_no_of_words] => 20114 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068253 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/068253
Arrangements for storing more data in memory when using a hierarchical memory structure Dec 18, 2022 Issued
Array ( [id] => 18803206 [patent_doc_number] => 11836364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Storage fragmentation assessment [patent_app_type] => utility [patent_app_number] => 18/079598 [patent_app_country] => US [patent_app_date] => 2022-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079598 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/079598
Storage fragmentation assessment Dec 11, 2022 Issued
Array ( [id] => 18873429 [patent_doc_number] => 11861239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Encoding and decoding data bits stored in a combination of multiple memory cells [patent_app_type] => utility [patent_app_number] => 18/077937 [patent_app_country] => US [patent_app_date] => 2022-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 12906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18077937 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/077937
Encoding and decoding data bits stored in a combination of multiple memory cells Dec 7, 2022 Issued
Array ( [id] => 19220002 [patent_doc_number] => 20240184706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => MANAGING DATA USING PERSISTENT STORAGE [patent_app_type] => utility [patent_app_number] => 18/073470 [patent_app_country] => US [patent_app_date] => 2022-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9193 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073470 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/073470
Managing data using persistent storage Nov 30, 2022 Issued
Array ( [id] => 19445657 [patent_doc_number] => 12095960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Secure media transfer appliance [patent_app_type] => utility [patent_app_number] => 18/055617 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 9153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055617 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055617
Secure media transfer appliance Nov 14, 2022 Issued
Array ( [id] => 19595954 [patent_doc_number] => 12153801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Non-volatile memory with optimized operation sequence [patent_app_type] => utility [patent_app_number] => 17/983870 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 23537 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983870 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983870
Non-volatile memory with optimized operation sequence Nov 8, 2022 Issued
Array ( [id] => 19228266 [patent_doc_number] => 12007902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Configurable memory system and memory managing method thereof [patent_app_type] => utility [patent_app_number] => 17/984189 [patent_app_country] => US [patent_app_date] => 2022-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984189 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984189
Configurable memory system and memory managing method thereof Nov 8, 2022 Issued
Array ( [id] => 18360395 [patent_doc_number] => 20230141986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => System and Method for Enhancing Flash Channel Utilization [patent_app_type] => utility [patent_app_number] => 17/981780 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981780 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981780
System and method for enhancing flash channel utilization Nov 6, 2022 Issued
Array ( [id] => 19355925 [patent_doc_number] => 12056371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Memory device having reduced power noise in refresh operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/982099 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 12490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982099 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982099
Memory device having reduced power noise in refresh operation and operating method thereof Nov 6, 2022 Issued
Array ( [id] => 19398755 [patent_doc_number] => 12073121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Command timer interrupt [patent_app_type] => utility [patent_app_number] => 18/048292 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 14288 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048292
Command timer interrupt Oct 19, 2022 Issued
Array ( [id] => 19398755 [patent_doc_number] => 12073121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Command timer interrupt [patent_app_type] => utility [patent_app_number] => 18/048292 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 14288 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048292
Command timer interrupt Oct 19, 2022 Issued
Array ( [id] => 18577350 [patent_doc_number] => 11733879 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Data processing system and method for reading instruction data of instruction from memory including a comparison stage for preventing execution of wrong instruction data [patent_app_type] => utility [patent_app_number] => 17/965796 [patent_app_country] => US [patent_app_date] => 2022-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965796 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965796
Data processing system and method for reading instruction data of instruction from memory including a comparison stage for preventing execution of wrong instruction data Oct 13, 2022 Issued
Array ( [id] => 19084619 [patent_doc_number] => 20240111420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SPECULATIVE DRAM REQUEST ENABLING AND DISABLING [patent_app_type] => utility [patent_app_number] => 17/956417 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956417 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956417
Speculative dram request enabling and disabling Sep 28, 2022 Issued
Array ( [id] => 19398413 [patent_doc_number] => 12072774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Backup and restore via union mount filesystem [patent_app_type] => utility [patent_app_number] => 17/956407 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3704 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956407
Backup and restore via union mount filesystem Sep 28, 2022 Issued
Array ( [id] => 19084873 [patent_doc_number] => 20240111674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => Data Reuse Cache [patent_app_type] => utility [patent_app_number] => 17/955618 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955618 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955618
Data reuse cache Sep 28, 2022 Issued
Array ( [id] => 20344743 [patent_doc_number] => 12468473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => System and method for centralized management of workload and parallel service of prioritized requests [patent_app_type] => utility [patent_app_number] => 17/903177 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903177 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903177
System and method for centralized management of workload and parallel service of prioritized requests Sep 5, 2022 Issued
Menu