
Margaret R. Rubin
Examiner (ID: 17124)
| Most Active Art Unit | 2504 |
| Art Unit(s) | 2816, 3992, 2504 |
| Total Applications | 1578 |
| Issued Applications | 1422 |
| Pending Applications | 34 |
| Abandoned Applications | 122 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19021983
[patent_doc_number] => 20240078154
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => Sending Encoded Data Slices Via Multiple Routing Paths
[patent_app_type] => utility
[patent_app_number] => 18/499319
[patent_app_country] => US
[patent_app_date] => 2023-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499319
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/499319 | Sending encoded data slices via multiple routing paths | Oct 31, 2023 | Issued |
Array
(
[id] => 19547413
[patent_doc_number] => 20240364449
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => POWER SAVING IN A NETWORK DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/385259
[patent_app_country] => US
[patent_app_date] => 2023-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11934
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385259
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/385259 | POWER SAVING IN A NETWORK DEVICE | Oct 29, 2023 | Pending |
Array
(
[id] => 20001217
[patent_doc_number] => 20250139439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => REPLACEMENT OF TRANSMISSION DATA
[patent_app_type] => utility
[patent_app_number] => 18/385263
[patent_app_country] => US
[patent_app_date] => 2023-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 80068
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385263
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/385263 | REPLACEMENT OF TRANSMISSION DATA | Oct 29, 2023 | Pending |
Array
(
[id] => 20389814
[patent_doc_number] => 12489555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-02
[patent_title] => Codeword synchronization method, receiver, network device, and network system
[patent_app_type] => utility
[patent_app_number] => 18/494427
[patent_app_country] => US
[patent_app_date] => 2023-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 23087
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494427
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/494427 | Codeword synchronization method, receiver, network device, and network system | Oct 24, 2023 | Issued |
Array
(
[id] => 19918999
[patent_doc_number] => 12294385
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-05-06
[patent_title] => Bit-flipping decoder and decoding method based on super node
[patent_app_type] => utility
[patent_app_number] => 18/490051
[patent_app_country] => US
[patent_app_date] => 2023-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 4622
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490051
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/490051 | Bit-flipping decoder and decoding method based on super node | Oct 18, 2023 | Issued |
Array
(
[id] => 20331543
[patent_doc_number] => 12461819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-04
[patent_title] => Apparatus and methods for memory data integrity within die architectures
[patent_app_type] => utility
[patent_app_number] => 18/490478
[patent_app_country] => US
[patent_app_date] => 2023-10-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 8156
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490478
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/490478 | Apparatus and methods for memory data integrity within die architectures | Oct 18, 2023 | Issued |
Array
(
[id] => 18957434
[patent_doc_number] => 20240045761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-08
[patent_title] => DATA INTEGRITY VERIFICATION
[patent_app_type] => utility
[patent_app_number] => 18/381320
[patent_app_country] => US
[patent_app_date] => 2023-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7586
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381320
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/381320 | Data integrity verification in direct memory access (DMA) transfer | Oct 17, 2023 | Issued |
Array
(
[id] => 19704709
[patent_doc_number] => 12198755
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-14
[patent_title] => Nonvolatile semiconductor memory device that includes a plurality of strings
[patent_app_type] => utility
[patent_app_number] => 18/488517
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 52
[patent_figures_cnt] => 52
[patent_no_of_words] => 32519
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 403
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488517
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488517 | Nonvolatile semiconductor memory device that includes a plurality of strings | Oct 16, 2023 | Issued |
Array
(
[id] => 19147386
[patent_doc_number] => 20240146452
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-02
[patent_title] => METHODS AND APPARATUS FOR LATTICE-BASED SIGNAL MODULATION USING A GENERALIZATION OF POLAR CODES
[patent_app_type] => utility
[patent_app_number] => 18/377984
[patent_app_country] => US
[patent_app_date] => 2023-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10150
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377984
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377984 | Methods and apparatus for lattice-based signal modulation using a generalization of polar codes | Oct 8, 2023 | Issued |
Array
(
[id] => 19718866
[patent_doc_number] => 12204403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Efficient parity determination in zoned solid-state drives of a storage system
[patent_app_type] => utility
[patent_app_number] => 18/377441
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8628
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377441 | Efficient parity determination in zoned solid-state drives of a storage system | Oct 5, 2023 | Issued |
Array
(
[id] => 19718866
[patent_doc_number] => 12204403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Efficient parity determination in zoned solid-state drives of a storage system
[patent_app_type] => utility
[patent_app_number] => 18/377441
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8628
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377441 | Efficient parity determination in zoned solid-state drives of a storage system | Oct 5, 2023 | Issued |
Array
(
[id] => 19718866
[patent_doc_number] => 12204403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Efficient parity determination in zoned solid-state drives of a storage system
[patent_app_type] => utility
[patent_app_number] => 18/377441
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8628
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377441 | Efficient parity determination in zoned solid-state drives of a storage system | Oct 5, 2023 | Issued |
Array
(
[id] => 19718866
[patent_doc_number] => 12204403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-21
[patent_title] => Efficient parity determination in zoned solid-state drives of a storage system
[patent_app_type] => utility
[patent_app_number] => 18/377441
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8628
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377441
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377441 | Efficient parity determination in zoned solid-state drives of a storage system | Oct 5, 2023 | Issued |
Array
(
[id] => 19949870
[patent_doc_number] => 12321232
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Memory controller which implements partial writes with error signaling
[patent_app_type] => utility
[patent_app_number] => 18/480992
[patent_app_country] => US
[patent_app_date] => 2023-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2476
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480992
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/480992 | Memory controller which implements partial writes with error signaling | Oct 3, 2023 | Issued |
Array
(
[id] => 19131812
[patent_doc_number] => 20240137165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-25
[patent_title] => COMPUTING DEVICE AND COMPUTING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/373268
[patent_app_country] => US
[patent_app_date] => 2023-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2887
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373268
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/373268 | Computing device and computing method for computing packet transmission time | Sep 25, 2023 | Issued |
Array
(
[id] => 20417400
[patent_doc_number] => 12500696
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-16
[patent_title] => Polar code-based decoding method and apparatus
[patent_app_type] => utility
[patent_app_number] => 18/458945
[patent_app_country] => US
[patent_app_date] => 2023-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6491
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458945
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/458945 | Polar code-based decoding method and apparatus | Aug 29, 2023 | Issued |
Array
(
[id] => 18832635
[patent_doc_number] => 20230401162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
[patent_app_type] => utility
[patent_app_number] => 18/456619
[patent_app_country] => US
[patent_app_date] => 2023-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 95351
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18456619
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/456619 | Fully pipelined read-modify-write support | Aug 27, 2023 | Issued |
Array
(
[id] => 18819593
[patent_doc_number] => 20230393933
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => ERROR CORRECTING CODES FOR MULTI-MASTER MEMORY CONTROLLER
[patent_app_type] => utility
[patent_app_number] => 18/453598
[patent_app_country] => US
[patent_app_date] => 2023-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8474
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453598
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/453598 | Error correcting codes for multi-master memory controller | Aug 21, 2023 | Issued |
Array
(
[id] => 20242857
[patent_doc_number] => 12423176
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-23
[patent_title] => Variable node data management for integrity check in memory systems
[patent_app_type] => utility
[patent_app_number] => 18/224030
[patent_app_country] => US
[patent_app_date] => 2023-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 7753
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224030
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/224030 | Variable node data management for integrity check in memory systems | Jul 18, 2023 | Issued |
Array
(
[id] => 18810809
[patent_doc_number] => 20230385145
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => MEMORY ADDRESS PROTECTION CIRCUIT AND METHOD OF OPERATING SAME
[patent_app_type] => utility
[patent_app_number] => 18/355222
[patent_app_country] => US
[patent_app_date] => 2023-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7203
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355222
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/355222 | Memory address protection circuit including an error detection circuit and method of operating same | Jul 18, 2023 | Issued |