![](/images/general/no_picture/200_user.png)
Marguerite J Mcmahon
Examiner (ID: 16970, Phone: (571)272-4848 , Office: P/3747 )
Most Active Art Unit | 3747 |
Art Unit(s) | 3402, 3741, 3709, 3747, 2899, 3783, 3727 |
Total Applications | 2817 |
Issued Applications | 2282 |
Pending Applications | 118 |
Abandoned Applications | 417 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 15703605
[patent_doc_number] => 10607990
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-31
[patent_title] => Fabrication of field effect transistors with different threshold voltages through modified channel interfaces
[patent_app_type] => utility
[patent_app_number] => 15/590627
[patent_app_country] => US
[patent_app_date] => 2017-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 6669
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15590627
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/590627 | Fabrication of field effect transistors with different threshold voltages through modified channel interfaces | May 8, 2017 | Issued |
Array
(
[id] => 15109151
[patent_doc_number] => 10475907
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-12
[patent_title] => Vertical tunnel field effect transistor (FET)
[patent_app_type] => utility
[patent_app_number] => 15/589046
[patent_app_country] => US
[patent_app_date] => 2017-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 7634
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589046
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/589046 | Vertical tunnel field effect transistor (FET) | May 7, 2017 | Issued |
Array
(
[id] => 14351231
[patent_doc_number] => 20190157588
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-23
[patent_title] => HIGH REFRACTIVE INDEX (HRI) SUBSTRATE AND METHOD FOR FABRICATION THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/096208
[patent_app_country] => US
[patent_app_date] => 2017-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7657
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16096208
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/096208 | HIGH REFRACTIVE INDEX (HRI) SUBSTRATE AND METHOD FOR FABRICATION THEREOF | Apr 27, 2017 | Abandoned |
Array
(
[id] => 11854857
[patent_doc_number] => 20170229349
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-10
[patent_title] => 'Self-Aligned Nanowire Formation Using Double Patterning'
[patent_app_type] => utility
[patent_app_number] => 15/495150
[patent_app_country] => US
[patent_app_date] => 2017-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 4488
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495150
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/495150 | Self-aligned nanowire formation using double patterning | Apr 23, 2017 | Issued |
Array
(
[id] => 11842120
[patent_doc_number] => 20170223841
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-03
[patent_title] => 'CARRIER SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 15/488519
[patent_app_country] => US
[patent_app_date] => 2017-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 9152
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15488519
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/488519 | Carrier substrate | Apr 16, 2017 | Issued |
Array
(
[id] => 14318711
[patent_doc_number] => 20190149059
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => PHASE MODULE FOR A POWER CONVERTER
[patent_app_type] => utility
[patent_app_number] => 16/300402
[patent_app_country] => US
[patent_app_date] => 2017-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5823
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16300402
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/300402 | Phase module for a power converter | Mar 23, 2017 | Issued |
Array
(
[id] => 13667801
[patent_doc_number] => 10164082
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-25
[patent_title] => Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure
[patent_app_type] => utility
[patent_app_number] => 15/466461
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 98
[patent_no_of_words] => 23758
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466461
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466461 | Growth of cubic crystalline phase structure on silicon substrates and devices comprising the cubic crystalline phase structure | Mar 21, 2017 | Issued |
Array
(
[id] => 11983565
[patent_doc_number] => 20170287720
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'Methods to Prevent Whisker Growth in Metal Coatings'
[patent_app_type] => utility
[patent_app_number] => 15/466608
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2362
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466608
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466608 | Methods to Prevent Whisker Growth in Metal Coatings | Mar 21, 2017 | Abandoned |
Array
(
[id] => 13271137
[patent_doc_number] => 10147655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-04
[patent_title] => System and method for temperature control in plasma processing system
[patent_app_type] => utility
[patent_app_number] => 15/466520
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 7950
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466520
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466520 | System and method for temperature control in plasma processing system | Mar 21, 2017 | Issued |
Array
(
[id] => 11974864
[patent_doc_number] => 20170279018
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-28
[patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/466780
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6974
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466780
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466780 | Method for manufacturing semiconductor device | Mar 21, 2017 | Issued |
Array
(
[id] => 14366757
[patent_doc_number] => 10304690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-05-28
[patent_title] => Fluid dispense methodology and apparatus for imprint lithography
[patent_app_type] => utility
[patent_app_number] => 15/466662
[patent_app_country] => US
[patent_app_date] => 2017-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 7888
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466662
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/466662 | Fluid dispense methodology and apparatus for imprint lithography | Mar 21, 2017 | Issued |
Array
(
[id] => 13435209
[patent_doc_number] => 20180269147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-09-20
[patent_title] => METHOD OF FORMING A PACKAGED SEMICONDUCTOR DEVICE USING GANGED CONDUCTIVE CONNECTIVE ASSEMBLY AND STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 15/460032
[patent_app_country] => US
[patent_app_date] => 2017-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5856
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460032
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/460032 | Method of forming a packaged semiconductor device using ganged conductive connective assembly and structure | Mar 14, 2017 | Issued |
Array
(
[id] => 11983801
[patent_doc_number] => 20170287956
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-05
[patent_title] => 'SOLID-STATE IMAGING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/460022
[patent_app_country] => US
[patent_app_date] => 2017-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5406
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460022
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/460022 | SOLID-STATE IMAGING DEVICE | Mar 14, 2017 | Abandoned |
Array
(
[id] => 11966991
[patent_doc_number] => 20170271144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS AND RECORDING MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 15/456646
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11930
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456646
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456646 | Method of manufacturing semiconductor device, substrate processing apparatus and recording medium | Mar 12, 2017 | Issued |
Array
(
[id] => 12436533
[patent_doc_number] => 09978695
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-05-22
[patent_title] => Semiconductor device including leadframe with a combination of leads and lands and method
[patent_app_type] => utility
[patent_app_number] => 15/457937
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 14283
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15457937
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/457937 | Semiconductor device including leadframe with a combination of leads and lands and method | Mar 12, 2017 | Issued |
Array
(
[id] => 13257187
[patent_doc_number] => 10141290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-27
[patent_title] => Display device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/456570
[patent_app_country] => US
[patent_app_date] => 2017-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 32
[patent_no_of_words] => 4772
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456570
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456570 | Display device and method for manufacturing the same | Mar 11, 2017 | Issued |
Array
(
[id] => 12769477
[patent_doc_number] => 20180148327
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => METHOD FOR FORMING MICRO-ELECTRO-MECHANICAL SYSTEM (MEMS) DEVICE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 15/456271
[patent_app_country] => US
[patent_app_date] => 2017-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456271
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456271 | Method for forming micro-electro-mechanical system (MEMS) device structure | Mar 9, 2017 | Issued |
Array
(
[id] => 11959287
[patent_doc_number] => 20170263439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'Method of Manufacturing Semiconductor Device, Substrate Processing Apparatus and Recording Medium'
[patent_app_type] => utility
[patent_app_number] => 15/456284
[patent_app_country] => US
[patent_app_date] => 2017-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 15832
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456284
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456284 | Method of manufacturing semiconductor device, substrate processing apparatus and recording medium | Mar 9, 2017 | Issued |
Array
(
[id] => 13043033
[patent_doc_number] => 10043656
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-08-07
[patent_title] => Selective growth of silicon oxide or silicon nitride on silicon surfaces in the presence of silicon oxide
[patent_app_type] => utility
[patent_app_number] => 15/456301
[patent_app_country] => US
[patent_app_date] => 2017-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 11154
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456301
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456301 | Selective growth of silicon oxide or silicon nitride on silicon surfaces in the presence of silicon oxide | Mar 9, 2017 | Issued |
Array
(
[id] => 11925280
[patent_doc_number] => 09792865
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-17
[patent_title] => 'Display device'
[patent_app_type] => utility
[patent_app_number] => 15/454460
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 18
[patent_no_of_words] => 14612
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454460
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454460 | Display device | Mar 8, 2017 | Issued |