Search

Maria J. Edwards

Examiner (ID: 309)

Most Active Art Unit
2924
Art Unit(s)
2911, 2924
Total Applications
1114
Issued Applications
1084
Pending Applications
27
Abandoned Applications
14

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16772442 [patent_doc_number] => 10983544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Output circuit [patent_app_type] => utility [patent_app_number] => 16/600123 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6885 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600123
Output circuit Oct 10, 2019 Issued
Array ( [id] => 15463639 [patent_doc_number] => 20200044644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => PROGRAMMABLE CURRENT FOR CORRELATED ELECTRON SWITCH [patent_app_type] => utility [patent_app_number] => 16/600366 [patent_app_country] => US [patent_app_date] => 2019-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600366 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600366
Programmable current for correlated electron switch Oct 10, 2019 Issued
Array ( [id] => 17991402 [patent_doc_number] => 20220357439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => MULTI-SITE RANGE RATE MEASUREMENT COMPILATION IN A WIRELESS COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/761325 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17761325 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/761325
MULTI-SITE RANGE RATE MEASUREMENT COMPILATION IN A WIRELESS COMMUNICATION SYSTEM Sep 18, 2019 Pending
Array ( [id] => 15352965 [patent_doc_number] => 20200014374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => SYSTEM AND METHOD FOR CALIBRATING PULSE WIDTH AND DELAY [patent_app_type] => utility [patent_app_number] => 16/572059 [patent_app_country] => US [patent_app_date] => 2019-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572059 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/572059
SYSTEM AND METHOD FOR CALIBRATING PULSE WIDTH AND DELAY Sep 15, 2019 Abandoned
Array ( [id] => 16609822 [patent_doc_number] => 10910843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => GaN circuit drivers for GaN circuit loads [patent_app_type] => utility [patent_app_number] => 16/550272 [patent_app_country] => US [patent_app_date] => 2019-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 68 [patent_no_of_words] => 23727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16550272 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/550272
GaN circuit drivers for GaN circuit loads Aug 24, 2019 Issued
Array ( [id] => 16496407 [patent_doc_number] => 10862464 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-08 [patent_title] => Comparing device and method of controlling comparing device [patent_app_type] => utility [patent_app_number] => 16/548851 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548851 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548851
Comparing device and method of controlling comparing device Aug 22, 2019 Issued
Array ( [id] => 16661439 [patent_doc_number] => 20210058076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => HYBRID FIN FLIP FLOP CIRCUIT ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/548517 [patent_app_country] => US [patent_app_date] => 2019-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16548517 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/548517
HYBRID FIN FLIP FLOP CIRCUIT ARCHITECTURE Aug 21, 2019 Abandoned
Array ( [id] => 18432335 [patent_doc_number] => 11677573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Contactless PoE connector and contactless PoE connection system [patent_app_type] => utility [patent_app_number] => 17/269838 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3941 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 516 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17269838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/269838
Contactless PoE connector and contactless PoE connection system Aug 20, 2019 Issued
Array ( [id] => 16767246 [patent_doc_number] => 10979038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Methods and devices for in-phase and quadrature signal generation [patent_app_type] => utility [patent_app_number] => 16/546847 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5420 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546847 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546847
Methods and devices for in-phase and quadrature signal generation Aug 20, 2019 Issued
Array ( [id] => 16456765 [patent_doc_number] => 20200366191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-19 [patent_title] => NEGATIVE VOLTAGE GENERATION CIRCUIT WITHOUT LOW-DROPOUT REGULATOR [patent_app_type] => utility [patent_app_number] => 16/536601 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8090 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16536601 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/536601
Negative voltage generation circuit without low-dropout regulator Aug 8, 2019 Issued
Array ( [id] => 19655930 [patent_doc_number] => 12177747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Technique for assessing positioning qualities [patent_app_type] => utility [patent_app_number] => 17/631050 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5320 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17631050 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/631050
Technique for assessing positioning qualities Jul 29, 2019 Issued
Array ( [id] => 17888445 [patent_doc_number] => 20220303923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => TERMINAL AND COMMUNICATION NODE [patent_app_type] => utility [patent_app_number] => 17/631224 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17631224 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/631224
Terminal and communication node Jul 29, 2019 Issued
Array ( [id] => 16614995 [patent_doc_number] => 20210033648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => CURRENT SENSOR [patent_app_type] => utility [patent_app_number] => 16/524681 [patent_app_country] => US [patent_app_date] => 2019-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/524681
Current sensor Jul 28, 2019 Issued
Array ( [id] => 18098045 [patent_doc_number] => 20220416386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => WAVEGUIDE BAND-STOP FILTER ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 17/621791 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17621791 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/621791
Waveguide band-stop filter arrangement Jun 27, 2019 Issued
Array ( [id] => 16944763 [patent_doc_number] => 11057022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => PVT compensated delay cell for a monostable [patent_app_type] => utility [patent_app_number] => 16/454872 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7687 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16454872 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/454872
PVT compensated delay cell for a monostable Jun 26, 2019 Issued
Array ( [id] => 16448963 [patent_doc_number] => 10840898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Semiconductor device and electronic control device [patent_app_type] => utility [patent_app_number] => 16/452205 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13414 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452205 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/452205
Semiconductor device and electronic control device Jun 24, 2019 Issued
Array ( [id] => 16529526 [patent_doc_number] => 20200403607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => Switched Capacitor Driving Circuits for Power Semiconductors [patent_app_type] => utility [patent_app_number] => 16/444384 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16444384 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/444384
Switched capacitor driving circuits for power semiconductors Jun 17, 2019 Issued
Array ( [id] => 14876895 [patent_doc_number] => 20190288689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => EXTENDED GPIO (eGPIO) [patent_app_type] => utility [patent_app_number] => 16/433098 [patent_app_country] => US [patent_app_date] => 2019-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16433098 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/433098
Extended GPIO (eGPIO) Jun 5, 2019 Issued
Array ( [id] => 16732032 [patent_doc_number] => 20210099180 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/970750 [patent_app_country] => US [patent_app_date] => 2019-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16970750 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/970750
Semiconductor devices Jun 4, 2019 Issued
Array ( [id] => 18052755 [patent_doc_number] => 11526135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => Using time-to-digital converters to delay signals with high accuracy and large range [patent_app_type] => utility [patent_app_number] => 16/428288 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428288
Using time-to-digital converters to delay signals with high accuracy and large range May 30, 2019 Issued
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