Search

Maria J. Edwards

Examiner (ID: 309)

Most Active Art Unit
2924
Art Unit(s)
2911, 2924
Total Applications
1114
Issued Applications
1084
Pending Applications
27
Abandoned Applications
14

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12062483 [patent_doc_number] => 20170338827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'DIGITAL PHASE LOCKED LOOP FOR LOW JITTER APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 15/668790 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9497 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15668790 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/668790
Digital phase locked loop for low jitter applications Aug 3, 2017 Issued
Array ( [id] => 12155362 [patent_doc_number] => 20180026625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'PROGRAMMABLE CURRENT FOR CORRELATED ELECTRON SWITCH' [patent_app_type] => utility [patent_app_number] => 15/659534 [patent_app_country] => US [patent_app_date] => 2017-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10503 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15659534 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/659534
Programmable current for correlated electron switch Jul 24, 2017 Issued
Array ( [id] => 12034164 [patent_doc_number] => 20170324263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'GaN CIRCUIT DRIVERS FOR GaN CIRCUIT LOADS' [patent_app_type] => utility [patent_app_number] => 15/658242 [patent_app_country] => US [patent_app_date] => 2017-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 24325 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15658242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/658242
GaN circuit drivers for GaN circuit loads Jul 23, 2017 Issued
Array ( [id] => 16952430 [patent_doc_number] => 20210211122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => Duty Cycle Adjustment Apparatus [patent_app_type] => utility [patent_app_number] => 16/082066 [patent_app_country] => US [patent_app_date] => 2017-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16082066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/082066
Duty cycle adjustment apparatus Jul 20, 2017 Issued
Array ( [id] => 15669107 [patent_doc_number] => 10598776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Method for determining sampling phase of sampling clock signal and associated electronic device [patent_app_type] => utility [patent_app_number] => 15/639049 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4556 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15639049 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/639049
Method for determining sampling phase of sampling clock signal and associated electronic device Jun 29, 2017 Issued
Array ( [id] => 14770709 [patent_doc_number] => 10396767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/637968 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5174 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637968 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637968
Semiconductor device Jun 28, 2017 Issued
Array ( [id] => 12774775 [patent_doc_number] => 20180150093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-31 [patent_title] => DRIVER CIRCUIT, CORRESPONDING DEVICE, APPARATUS AND METHOD [patent_app_type] => utility [patent_app_number] => 15/637225 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15637225 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/637225
Driver circuit, corresponding device, apparatus and method Jun 28, 2017 Issued
Array ( [id] => 15489483 [patent_doc_number] => 10560110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-11 [patent_title] => Precision microwave frequency synthesizer and receiver with delay balanced drift canceling loop [patent_app_type] => utility [patent_app_number] => 15/636515 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4949 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636515 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636515
Precision microwave frequency synthesizer and receiver with delay balanced drift canceling loop Jun 27, 2017 Issued
Array ( [id] => 15389875 [patent_doc_number] => 10536147 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-14 [patent_title] => Level shifter [patent_app_type] => utility [patent_app_number] => 15/635886 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3507 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15635886 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/635886
Level shifter Jun 27, 2017 Issued
Array ( [id] => 13228393 [patent_doc_number] => 10127975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Determination circuit [patent_app_type] => utility [patent_app_number] => 15/636080 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 9241 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636080 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636080
Determination circuit Jun 27, 2017 Issued
Array ( [id] => 13501053 [patent_doc_number] => 20180302069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-18 [patent_title] => SYSTEM AND METHOD FOR CALIBRATING PULSE WIDTH AND DELAY [patent_app_type] => utility [patent_app_number] => 15/636387 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636387 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636387
System and method for calibrating pulse width and delay Jun 27, 2017 Issued
Array ( [id] => 13742061 [patent_doc_number] => 20180375500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => SCAN OUTPUT FLIP-FLOPS [patent_app_type] => utility [patent_app_number] => 15/634007 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634007 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634007
Scan output flip-flops Jun 26, 2017 Issued
Array ( [id] => 13710437 [patent_doc_number] => 20170366173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => HIGH VOLTAGE PRE-PULSING [patent_app_type] => utility [patent_app_number] => 15/628584 [patent_app_country] => US [patent_app_date] => 2017-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7978 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15628584 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/628584
High voltage pre-pulsing Jun 19, 2017 Issued
Array ( [id] => 12695209 [patent_doc_number] => 20180123569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => FLIP-FLOP AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/623412 [patent_app_country] => US [patent_app_date] => 2017-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9139 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15623412 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/623412
Flip-flop and semiconductor system including the same Jun 14, 2017 Issued
Array ( [id] => 15062817 [patent_doc_number] => 10461725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Voltage comparator, voltage comparison method of the same, and reset method of the same [patent_app_type] => utility [patent_app_number] => 15/622513 [patent_app_country] => US [patent_app_date] => 2017-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6342 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15622513 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/622513
Voltage comparator, voltage comparison method of the same, and reset method of the same Jun 13, 2017 Issued
Array ( [id] => 16418573 [patent_doc_number] => 10826483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Power chip and bridge circuit [patent_app_type] => utility [patent_app_number] => 15/613424 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613424 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613424
Power chip and bridge circuit Jun 4, 2017 Issued
Array ( [id] => 14135115 [patent_doc_number] => 20190101947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => STABILIZED VOLTAGE AND CURRENT REFERENCE GENERATOR AND CIRCUITS [patent_app_type] => utility [patent_app_number] => 16/099400 [patent_app_country] => US [patent_app_date] => 2017-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16099400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/099400
Stabilized voltage and current reference generator and circuits May 17, 2017 Issued
Array ( [id] => 11940245 [patent_doc_number] => 20170244396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'Method And Apparatus For Cancellation Of Spurious Signals' [patent_app_type] => utility [patent_app_number] => 15/589314 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6038 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589314 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589314
Method And Apparatus For Cancellation Of Spurious Signals May 7, 2017 Abandoned
Array ( [id] => 14334363 [patent_doc_number] => 10298214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Clock switch device and system-on-chip having the same [patent_app_type] => utility [patent_app_number] => 15/584448 [patent_app_country] => US [patent_app_date] => 2017-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 5434 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15584448 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/584448
Clock switch device and system-on-chip having the same May 1, 2017 Issued
Array ( [id] => 11855553 [patent_doc_number] => 20170230045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'METHOD AND APPARATUS FOR A BROWN OUT DETECTOR' [patent_app_type] => utility [patent_app_number] => 15/495423 [patent_app_country] => US [patent_app_date] => 2017-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15495423 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/495423
Method and apparatus for a brown out detector Apr 23, 2017 Issued
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