Maria J. Edwards

Array ( [id] => 19812914 [patent_doc_number] => 12244329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Split input amplifier for protection from DC offset [patent_app_type] => utility [patent_app_number] => 18/484265 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7674 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18484265 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19117202 [patent_doc_number] => 20240128952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => LOW POWER FLIP-FLOP [patent_app_type] => utility [patent_app_number] => 18/377777 [patent_app_country] => US [patent_app_date] => 2023-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377777 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19101698 [patent_doc_number] => 20240120926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => CHARGE PUMP FILTERING CIRCUIT, PHASE-LOCKED LOOP CIRCUIT, AND CLOCK DATA RECOVERY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/482021 [patent_app_country] => US [patent_app_date] => 2023-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4914 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19620097 [patent_doc_number] => 20240405777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => CLOCK GENERATION CIRCUIT, AND SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM USING THE CLOCK GENERATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/478667 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18883683 [patent_doc_number] => 20240007052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => EFFICIENT HIGH POWER MICROWAVE GENERATION USING RECIRCULATING PULSES [patent_app_type] => utility [patent_app_number] => 18/470415 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470415 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18883746 [patent_doc_number] => 20240007115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => PHASE-LOCKED LOOP FREQUENCY SYNTHESIZER AND CONTROL METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/469575 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5738 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469575 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19836397 [patent_doc_number] => 20250088183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => RF SERIES SWITCH ARRANGEMENT WITH SWITCHING TIME ACCELERATION [patent_app_type] => utility [patent_app_number] => 18/463680 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19147230 [patent_doc_number] => 20240146285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => META-STABILITY-FREE TWO-CLOCK-DOMAIN SYNCHRONOUS LATCH [patent_app_type] => utility [patent_app_number] => 18/458821 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18821898 [patent_doc_number] => 20230396239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SIGNAL GENERATION CIRCUIT HAVING MINIMUM DELAY, SEMICONDUCTOR APPARATUS USING THE SAME, AND SIGNAL GENERATION METHOD [patent_app_type] => utility [patent_app_number] => 18/450749 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450749 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18813584 [patent_doc_number] => 20230387921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => ADJUSTABLE PHASE LOCKED LOOP [patent_app_type] => utility [patent_app_number] => 18/448319 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448319 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20118722 [patent_doc_number] => 12368444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Systems and methods for phase locked loop realignment with skew cancellation [patent_app_type] => utility [patent_app_number] => 18/446881 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446881 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20515183 [patent_doc_number] => 20260039286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => COMPARATOR WITH HYSTERESIS AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/995189 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18995189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18834490 [patent_doc_number] => 20230403017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => PHASE LOCKED LOOP USING ADAPTIVE FILTER TUNING FOR RADIATION HARDENING [patent_app_type] => utility [patent_app_number] => 18/320130 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320130 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19782086 [patent_doc_number] => 12231133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Self-referenced delay cell-based time-to-digital converter [patent_app_type] => utility [patent_app_number] => 18/144967 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7060 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18144967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19524597 [patent_doc_number] => 12126341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Extending on-time for power converter control [patent_app_type] => utility [patent_app_number] => 18/301529 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 9294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301529 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19671514 [patent_doc_number] => 12184293 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Circuit device and oscillator [patent_app_type] => utility [patent_app_number] => 18/192111 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 20291 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18192111 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19469160 [patent_doc_number] => 20240322830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => PHASE-LOCKED LOOP (PLL) WITH AUTOMATIC LOOP BANDWIDTH CONTROL [patent_app_type] => utility [patent_app_number] => 18/186559 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186559 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19154230 [patent_doc_number] => 11979155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Semiconductor integrated circuit device and level shifter circuit [patent_app_type] => utility [patent_app_number] => 18/177558 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 8424 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19222245 [patent_doc_number] => 20240186949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SWITCH CIRCUIT AND PROGRAMMABLE CONNECTION CHIP [patent_app_type] => utility [patent_app_number] => 18/097933 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18097933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19539887 [patent_doc_number] => 12132447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => 5G dual-band up-mixer with switching between amplification function and frequency mixing function, and terminal [patent_app_type] => utility [patent_app_number] => 18/262527 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3455 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18262527 [rel_patent_id] =>[rel_patent_doc_number] =>)