
Maria Veronica Ewald
Supervisory Patent Examiner (ID: 6295, Phone: (571)272-8519 , Office: P/1783 )
| Most Active Art Unit | 1791 |
| Art Unit(s) | 1722, 1791, 1783, 1744 |
| Total Applications | 551 |
| Issued Applications | 332 |
| Pending Applications | 40 |
| Abandoned Applications | 186 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5955845
[patent_doc_number] => 20110180891
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-28
[patent_title] => 'CONDUCTOR PACKAGE STRUCTURE AND METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/869001
[patent_app_country] => US
[patent_app_date] => 2010-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4239
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0180/20110180891.pdf
[firstpage_image] =>[orig_patent_app_number] => 12869001
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/869001 | CONDUCTOR PACKAGE STRUCTURE AND METHOD OF THE SAME | Aug 25, 2010 | Abandoned |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 8675336
[patent_doc_number] => 08383449
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method of forming a thin film transistor having openings formed therein'
[patent_app_type] => utility
[patent_app_number] => 12/857442
[patent_app_country] => US
[patent_app_date] => 2010-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 6364
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857442
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/857442 | Method of forming a thin film transistor having openings formed therein | Aug 15, 2010 | Issued |
Array
(
[id] => 6260877
[patent_doc_number] => 20100251865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'METHOD OF FABRICATING SINGLE CRYSTAL GALLIUM NITRIDE SEMICONDUCTOR SUBSTRATE, NITRIDE GALLIUM SEMICONDUCTOR SUBSTRATE AND NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/817817
[patent_app_country] => US
[patent_app_date] => 2010-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7238
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0251/20100251865.pdf
[firstpage_image] =>[orig_patent_app_number] => 12817817
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/817817 | Method of fabricating single crystal gallium nitride semiconductor substrate, nitride gallium semiconductor substrate and nitride semiconductor epitaxial substrate | Jun 16, 2010 | Issued |
Array
(
[id] => 6273898
[patent_doc_number] => 20100255673
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING ELASTIC SOLDER BUMP TO PREVENT DISCONNECTION'
[patent_app_type] => utility
[patent_app_number] => 12/817742
[patent_app_country] => US
[patent_app_date] => 2010-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5552
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20100255673.pdf
[firstpage_image] =>[orig_patent_app_number] => 12817742
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/817742 | Semiconductor device having elastic solder bump to prevent disconnection | Jun 16, 2010 | Issued |
Array
(
[id] => 8694746
[patent_doc_number] => 20130056755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-07
[patent_title] => 'POWER SEMICONDUCTOR MODULE'
[patent_app_type] => utility
[patent_app_number] => 13/698901
[patent_app_country] => US
[patent_app_date] => 2010-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 11346
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13698901
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/698901 | Power semiconductor module | May 20, 2010 | Issued |
Array
(
[id] => 6508403
[patent_doc_number] => 20100216283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-26
[patent_title] => 'ELECTRONIC DEVICE AND LEAD FRAME'
[patent_app_type] => utility
[patent_app_number] => 12/774812
[patent_app_country] => US
[patent_app_date] => 2010-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5153
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0216/20100216283.pdf
[firstpage_image] =>[orig_patent_app_number] => 12774812
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/774812 | Electronic device and lead frame | May 5, 2010 | Issued |
Array
(
[id] => 6528570
[patent_doc_number] => 20100203684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-12
[patent_title] => 'SEMICONDUCTOR PACKAGE FORMED WITHIN AN ENCAPSULATION'
[patent_app_type] => utility
[patent_app_number] => 12/760964
[patent_app_country] => US
[patent_app_date] => 2010-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3653
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0203/20100203684.pdf
[firstpage_image] =>[orig_patent_app_number] => 12760964
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/760964 | Semiconductor package formed within an encapsulation | Apr 14, 2010 | Issued |
Array
(
[id] => 6319323
[patent_doc_number] => 20100243639
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'FLEXIBLE HORIZONTAL ELECTRODE PIPE'
[patent_app_type] => utility
[patent_app_number] => 12/729613
[patent_app_country] => US
[patent_app_date] => 2010-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3346
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0243/20100243639.pdf
[firstpage_image] =>[orig_patent_app_number] => 12729613
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/729613 | FLEXIBLE HORIZONTAL ELECTRODE PIPE | Mar 22, 2010 | Abandoned |
Array
(
[id] => 6231301
[patent_doc_number] => 20100264503
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'SOLID-STATE IMAGING DEVICE COMPRISING THROUGH-ELECTRODE'
[patent_app_type] => utility
[patent_app_number] => 12/727564
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3857
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0264/20100264503.pdf
[firstpage_image] =>[orig_patent_app_number] => 12727564
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727564 | Solid-state imaging device comprising through-electrode | Mar 18, 2010 | Issued |
Array
(
[id] => 6286023
[patent_doc_number] => 20100237394
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-23
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 12/659735
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9277
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20100237394.pdf
[firstpage_image] =>[orig_patent_app_number] => 12659735
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/659735 | Semiconductor memory device | Mar 18, 2010 | Abandoned |
Array
(
[id] => 7699547
[patent_doc_number] => 20110227043
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'GRAPHENE SENSOR'
[patent_app_type] => utility
[patent_app_number] => 12/727434
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 1968
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20110227043.pdf
[firstpage_image] =>[orig_patent_app_number] => 12727434
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727434 | GRAPHENE SENSOR | Mar 18, 2010 | Abandoned |
Array
(
[id] => 9883202
[patent_doc_number] => 08969969
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-03
[patent_title] => 'High threshold voltage NMOS transistors for low power IC technology'
[patent_app_type] => utility
[patent_app_number] => 12/727312
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 3585
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12727312
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727312 | High threshold voltage NMOS transistors for low power IC technology | Mar 18, 2010 | Issued |