Search

Marianne P Allen

Examiner (ID: 7811, Phone: (571)272-0712 , Office: P/1647 )

Most Active Art Unit
1647
Art Unit(s)
1647, 1818, 1645, 1812, 1805, 1631
Total Applications
2066
Issued Applications
986
Pending Applications
235
Abandoned Applications
845

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2951511 [patent_doc_number] => 05191655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-02 [patent_title] => 'Interface arrangement for facilitating data communication between a computer and peripherals' [patent_app_type] => 1 [patent_app_number] => 7/782911 [patent_app_country] => US [patent_app_date] => 1991-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4492 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/191/05191655.pdf [firstpage_image] =>[orig_patent_app_number] => 782911 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/782911
Interface arrangement for facilitating data communication between a computer and peripherals Oct 23, 1991 Issued
07/774642 METHOD FOR EXTRACTING PROCEDURAL KNOWLEDGE FROM AN EXPERT Oct 10, 1991 Abandoned
Array ( [id] => 3024037 [patent_doc_number] => 05333290 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'DMA controller having jump function' [patent_app_type] => 1 [patent_app_number] => 7/741936 [patent_app_country] => US [patent_app_date] => 1991-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2467 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/333/05333290.pdf [firstpage_image] =>[orig_patent_app_number] => 741936 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/741936
DMA controller having jump function Aug 7, 1991 Issued
07/735313 AN EXTERNAL MEMORY HAVING AUTHETICATING PROCESSOR Jul 23, 1991 Abandoned
Array ( [id] => 2925264 [patent_doc_number] => 05237669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-17 [patent_title] => 'Memory management method' [patent_app_type] => 1 [patent_app_number] => 7/730244 [patent_app_country] => US [patent_app_date] => 1991-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 11622 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/237/05237669.pdf [firstpage_image] =>[orig_patent_app_number] => 730244 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/730244
Memory management method Jul 14, 1991 Issued
07/728589 INFORMATION PROCESSING SYSTEM HAVING DMA CAPABILITY Jul 10, 1991 Abandoned
Array ( [id] => 2961599 [patent_doc_number] => 05222224 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-22 [patent_title] => 'Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system' [patent_app_type] => 1 [patent_app_number] => 7/727296 [patent_app_country] => US [patent_app_date] => 1991-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 11262 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 746 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/222/05222224.pdf [firstpage_image] =>[orig_patent_app_number] => 727296 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/727296
Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system Jul 8, 1991 Issued
Array ( [id] => 2943660 [patent_doc_number] => 05233613 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Reliable watchdog timer' [patent_app_type] => 1 [patent_app_number] => 7/725233 [patent_app_country] => US [patent_app_date] => 1991-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8991 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233613.pdf [firstpage_image] =>[orig_patent_app_number] => 725233 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/725233
Reliable watchdog timer Jun 25, 1991 Issued
Array ( [id] => 3024012 [patent_doc_number] => 05333289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'Main memory addressing system' [patent_app_type] => 1 [patent_app_number] => 7/703458 [patent_app_country] => US [patent_app_date] => 1991-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7046 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/333/05333289.pdf [firstpage_image] =>[orig_patent_app_number] => 703458 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/703458
Main memory addressing system May 20, 1991 Issued
Array ( [id] => 3094807 [patent_doc_number] => 05280589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Memory access control system for use with a relatively small size data processing system' [patent_app_type] => 1 [patent_app_number] => 7/689720 [patent_app_country] => US [patent_app_date] => 1991-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4238 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/280/05280589.pdf [firstpage_image] =>[orig_patent_app_number] => 689720 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/689720
Memory access control system for use with a relatively small size data processing system Apr 21, 1991 Issued
07/684145 METHOD AND A SYSTEM FOR PROCESSING A LOG RECORD Apr 10, 1991 Abandoned
07/677547 CONTROL SYSTEMS FOR CONTROLLING A CACHE MEMORY AND A CACHE TAG MEMORY Mar 28, 1991 Abandoned
07/670041 CIRCUIT FOR DESIGNATING WRITE AND READ ADDRESSES TO PROVIDE A DELAY TIME IN A SOUND SYSTEM Mar 14, 1991 Abandoned
Array ( [id] => 3456732 [patent_doc_number] => 05388239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-07 [patent_title] => 'Operand address modification system' [patent_app_type] => 1 [patent_app_number] => 7/668717 [patent_app_country] => US [patent_app_date] => 1991-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4285 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/388/05388239.pdf [firstpage_image] =>[orig_patent_app_number] => 668717 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/668717
Operand address modification system Mar 11, 1991 Issued
Array ( [id] => 3058580 [patent_doc_number] => 05287474 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'System for clearing a memory of a virtual machine' [patent_app_type] => 1 [patent_app_number] => 7/662019 [patent_app_country] => US [patent_app_date] => 1991-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4054 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287474.pdf [firstpage_image] =>[orig_patent_app_number] => 662019 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/662019
System for clearing a memory of a virtual machine Feb 27, 1991 Issued
Array ( [id] => 2976943 [patent_doc_number] => 05274789 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Multiprocessor system having distributed shared resources and dynamic and selective global data replication' [patent_app_type] => 1 [patent_app_number] => 7/660486 [patent_app_country] => US [patent_app_date] => 1991-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 9166 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274789.pdf [firstpage_image] =>[orig_patent_app_number] => 660486 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/660486
Multiprocessor system having distributed shared resources and dynamic and selective global data replication Feb 24, 1991 Issued
Array ( [id] => 3093731 [patent_doc_number] => 05321822 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-14 [patent_title] => 'Information processing system with addressing exception' [patent_app_type] => 1 [patent_app_number] => 7/657780 [patent_app_country] => US [patent_app_date] => 1991-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5204 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 668 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/321/05321822.pdf [firstpage_image] =>[orig_patent_app_number] => 657780 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/657780
Information processing system with addressing exception Feb 20, 1991 Issued
Array ( [id] => 3110366 [patent_doc_number] => 05293596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Multidimensional address generator and a system for controlling the generator' [patent_app_type] => 1 [patent_app_number] => 7/658154 [patent_app_country] => US [patent_app_date] => 1991-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7731 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 470 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293596.pdf [firstpage_image] =>[orig_patent_app_number] => 658154 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/658154
Multidimensional address generator and a system for controlling the generator Feb 19, 1991 Issued
Array ( [id] => 3110519 [patent_doc_number] => 05293604 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-08 [patent_title] => 'Memory access control device having bank access checking circuits smaller in number than memory modules' [patent_app_type] => 1 [patent_app_number] => 7/655947 [patent_app_country] => US [patent_app_date] => 1991-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6433 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 673 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/293/05293604.pdf [firstpage_image] =>[orig_patent_app_number] => 655947 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/655947
Memory access control device having bank access checking circuits smaller in number than memory modules Feb 14, 1991 Issued
07/655643 A COMMAND INTERFACE BETWEEN USER COMMANDS AND A MEMORY DEVICE Feb 10, 1991 Abandoned
Menu