Search

Marie D. Bays

Examiner (ID: 15536, Phone: (571)272-4559 , Office: P/3765 )

Most Active Art Unit
3728
Art Unit(s)
3728, 3765, 3732, 3208, 2404
Total Applications
3864
Issued Applications
2754
Pending Applications
238
Abandoned Applications
904

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17855415 [patent_doc_number] => 20220285458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => DISPLAY PANEL, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/637248 [patent_app_country] => US [patent_app_date] => 2021-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637248 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/637248
Display panel, method for manufacturing the same and display device Apr 14, 2021 Issued
Array ( [id] => 18481216 [patent_doc_number] => 11694971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-07-04 [patent_title] => Electro-optic package featuring sputtered EMI shield [patent_app_type] => utility [patent_app_number] => 17/229491 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 1683 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/229491
Electro-optic package featuring sputtered EMI shield Apr 12, 2021 Issued
Array ( [id] => 16995590 [patent_doc_number] => 20210234010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => METHOD OF PRODUCING A SEMICONDUCTOR DEVICE HAVING SPICULAR-SHAPED FIELD PLATE STRUCTURES AND A CURRENT SPREAD REGION [patent_app_type] => utility [patent_app_number] => 17/229219 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/229219
Method of producing a semiconductor device having spicular-shaped field plate structures and a current spread region Apr 12, 2021 Issued
Array ( [id] => 16966212 [patent_doc_number] => 20210217711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => INTEGRATED FUSE [patent_app_type] => utility [patent_app_number] => 17/217005 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/217005
Integrated fuse Mar 29, 2021 Issued
Array ( [id] => 18548353 [patent_doc_number] => 11721714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Pixel isolation elements, devices and associated methods [patent_app_type] => utility [patent_app_number] => 17/214333 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 10011 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/214333
Pixel isolation elements, devices and associated methods Mar 25, 2021 Issued
Array ( [id] => 18131409 [patent_doc_number] => 11557626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Complementary metal-oxide-semiconductor image sensor and method of making [patent_app_type] => utility [patent_app_number] => 17/212865 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 6474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212865 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212865
Complementary metal-oxide-semiconductor image sensor and method of making Mar 24, 2021 Issued
Array ( [id] => 18578893 [patent_doc_number] => 11735433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Substrate structure, package structure and method for manufacturing electronic package structure [patent_app_type] => utility [patent_app_number] => 17/213033 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 7584 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213033
Substrate structure, package structure and method for manufacturing electronic package structure Mar 24, 2021 Issued
Array ( [id] => 16966205 [patent_doc_number] => 20210217704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => MODULE [patent_app_type] => utility [patent_app_number] => 17/212234 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212234 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212234
Module Mar 24, 2021 Issued
Array ( [id] => 18190664 [patent_doc_number] => 11581266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-14 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/212035 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7703 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212035 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212035
Semiconductor package Mar 24, 2021 Issued
Array ( [id] => 18357867 [patent_doc_number] => 11646273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Module [patent_app_type] => utility [patent_app_number] => 17/205052 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 5775 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/205052
Module Mar 17, 2021 Issued
Array ( [id] => 17536689 [patent_doc_number] => 20220115298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => POWER AMPLIFIER MODULES WITH FLIP-CHIP AND NON-FLIP-CHIP POWER TRANSISTOR DIES [patent_app_type] => utility [patent_app_number] => 17/205390 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/205390
Power amplifier modules with flip-chip and non-flip-chip power transistor dies Mar 17, 2021 Issued
Array ( [id] => 18723324 [patent_doc_number] => 11800702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Method of forming a memory device [patent_app_type] => utility [patent_app_number] => 17/202359 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5642 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202359 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202359
Method of forming a memory device Mar 15, 2021 Issued
Array ( [id] => 18219550 [patent_doc_number] => 11594499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/203007 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203007
Semiconductor package Mar 15, 2021 Issued
Array ( [id] => 17389434 [patent_doc_number] => 20220037286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => SEMICONDUCTOR PACKAGES INCLUDING DAM PATTERNS AND METHODS FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/203555 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203555 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203555
Semiconductor packages including dam patterns and methods for manufacturing the same Mar 15, 2021 Issued
Array ( [id] => 19314443 [patent_doc_number] => 12040269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Preparation method for leads of semiconductor structure, and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/433348 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 4721 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17433348 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/433348
Preparation method for leads of semiconductor structure, and semiconductor structure Mar 14, 2021 Issued
Array ( [id] => 18804390 [patent_doc_number] => 11837554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Semiconductor package and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/200411 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7401 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200411 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200411
Semiconductor package and semiconductor device Mar 11, 2021 Issued
Array ( [id] => 17389371 [patent_doc_number] => 20220037223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => ELECTRONIC PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/199371 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199371 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199371
Electronic package structure and fabrication method thereof Mar 10, 2021 Issued
Array ( [id] => 18236007 [patent_doc_number] => 11600572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Routing structure between dies and method for arranging routing between dies [patent_app_type] => utility [patent_app_number] => 17/198262 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198262 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198262
Routing structure between dies and method for arranging routing between dies Mar 10, 2021 Issued
Array ( [id] => 17100248 [patent_doc_number] => 20210288039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-16 [patent_title] => RF CIRCUIT MODULE AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/196965 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196965
RF circuit module and manufacturing method therefor Mar 8, 2021 Issued
Array ( [id] => 17262813 [patent_doc_number] => 20210375798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Package Interface with Improved Impedance Continuity [patent_app_type] => utility [patent_app_number] => 17/194390 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17194390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/194390
Package interface with improved impedance continuity Mar 7, 2021 Issued
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