
Marie D. Bays
Examiner (ID: 15536, Phone: (571)272-4559 , Office: P/3765 )
| Most Active Art Unit | 3728 |
| Art Unit(s) | 3728, 3765, 3732, 3208, 2404 |
| Total Applications | 3864 |
| Issued Applications | 2754 |
| Pending Applications | 238 |
| Abandoned Applications | 904 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19054804
[patent_doc_number] => 20240096773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/319135
[patent_app_country] => US
[patent_app_date] => 2023-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6919
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319135
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/319135 | SEMICONDUCTOR PACKAGE | May 16, 2023 | Pending |
Array
(
[id] => 19057061
[patent_doc_number] => 20240099030
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => CHIP PACKAGE AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/303641
[patent_app_country] => US
[patent_app_date] => 2023-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14510
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303641
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/303641 | CHIP PACKAGE AND METHODS FOR FORMING THE SAME | Apr 19, 2023 | Pending |
Array
(
[id] => 18570583
[patent_doc_number] => 20230260920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/303595
[patent_app_country] => US
[patent_app_date] => 2023-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11397
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303595
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/303595 | Chip package and manufacturing method thereof | Apr 19, 2023 | Issued |
Array
(
[id] => 19285810
[patent_doc_number] => 20240222287
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/302023
[patent_app_country] => US
[patent_app_date] => 2023-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10087
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302023
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/302023 | PACKAGE INCLUDING COMPOSITE INTERPOSER AND/OR COMPOSITE PACKAGING SUBSTRATE AND METHODS OF FORMING THE SAME | Apr 17, 2023 | Pending |
Array
(
[id] => 18991217
[patent_doc_number] => 20240063186
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => SEMICONDUCTOR PACKAGE INCLUDING STACKED CHIPS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/301541
[patent_app_country] => US
[patent_app_date] => 2023-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7357
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18301541
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/301541 | SEMICONDUCTOR PACKAGE INCLUDING STACKED CHIPS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE | Apr 16, 2023 | Pending |
Array
(
[id] => 18898601
[patent_doc_number] => 20240014086
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/135541
[patent_app_country] => US
[patent_app_date] => 2023-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6419
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135541
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/135541 | SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR PACKAGE | Apr 16, 2023 | Issued |
Array
(
[id] => 19582575
[patent_doc_number] => 12148703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-19
[patent_title] => EMIB patch on glass laminate substrate
[patent_app_type] => utility
[patent_app_number] => 18/135067
[patent_app_country] => US
[patent_app_date] => 2023-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 6679
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135067
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/135067 | EMIB patch on glass laminate substrate | Apr 13, 2023 | Issued |
Array
(
[id] => 18975243
[patent_doc_number] => 20240055335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-15
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/134314
[patent_app_country] => US
[patent_app_date] => 2023-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6300
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18134314
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/134314 | SEMICONDUCTOR PACKAGE | Apr 12, 2023 | Pending |
Array
(
[id] => 18975322
[patent_doc_number] => 20240055414
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-15
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/299795
[patent_app_country] => US
[patent_app_date] => 2023-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7933
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18299795
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/299795 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE | Apr 12, 2023 | Pending |
Array
(
[id] => 18898712
[patent_doc_number] => 20240014197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-11
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/298702
[patent_app_country] => US
[patent_app_date] => 2023-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7404
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298702
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/298702 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME | Apr 10, 2023 | Pending |
Array
(
[id] => 19191502
[patent_doc_number] => 20240170415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/298819
[patent_app_country] => US
[patent_app_date] => 2023-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4085
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298819
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/298819 | ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF | Apr 10, 2023 | Pending |
Array
(
[id] => 18656703
[patent_doc_number] => 20230302604
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-28
[patent_title] => SUBSTRATE POLISHING APPARATUS AND POLISHING LIQUID DISCHARGE METHOD IN SUBSTRATE POLISHING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/297469
[patent_app_country] => US
[patent_app_date] => 2023-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9106
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -1
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297469
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/297469 | Substrate polishing apparatus and polishing liquid discharge method in substrate polishing apparatus | Apr 6, 2023 | Issued |
Array
(
[id] => 19468093
[patent_doc_number] => 20240321763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => PACKAGE SUBSTRATE COMPRISING AT LEAST TWO CORE LAYERS
[patent_app_type] => utility
[patent_app_number] => 18/189991
[patent_app_country] => US
[patent_app_date] => 2023-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189991
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/189991 | PACKAGE SUBSTRATE COMPRISING AT LEAST TWO CORE LAYERS | Mar 23, 2023 | Pending |
Array
(
[id] => 19468088
[patent_doc_number] => 20240321758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => DEFORMATION-RESISTANT INTERPOSER FOR A LOCAL SILICON INTERCONNECT AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/189299
[patent_app_country] => US
[patent_app_date] => 2023-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11191
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189299
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/189299 | DEFORMATION-RESISTANT INTERPOSER FOR A LOCAL SILICON INTERCONNECT AND METHODS FOR FORMING THE SAME | Mar 23, 2023 | Pending |
Array
(
[id] => 20692101
[patent_doc_number] => 12622277
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-05
[patent_title] => Semiconductor device and method of partial shielding with embedded graphene core shells
[patent_app_type] => utility
[patent_app_number] => 18/188720
[patent_app_country] => US
[patent_app_date] => 2023-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 43
[patent_no_of_words] => 3023
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188720
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/188720 | Semiconductor device and method of partial shielding with embedded graphene core shells | Mar 22, 2023 | Issued |
Array
(
[id] => 20649775
[patent_doc_number] => 12604739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-14
[patent_title] => Semiconductor device and method of forming a 3-D stacked semiconductor package structure
[patent_app_type] => utility
[patent_app_number] => 18/188844
[patent_app_country] => US
[patent_app_date] => 2023-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 31
[patent_no_of_words] => 972
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188844
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/188844 | Semiconductor device and method of forming a 3-D stacked semiconductor package structure | Mar 22, 2023 | Issued |
Array
(
[id] => 19007949
[patent_doc_number] => 20240072020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/188627
[patent_app_country] => US
[patent_app_date] => 2023-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7173
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18188627
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/188627 | SEMICONDUCTOR PACKAGE | Mar 22, 2023 | Pending |
Array
(
[id] => 18496600
[patent_doc_number] => 20230219187
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => POLISHING METHOD AND POLISHING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/187786
[patent_app_country] => US
[patent_app_date] => 2023-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10374
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187786
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/187786 | Polishing method and polishing apparatus | Mar 21, 2023 | Issued |
Array
(
[id] => 20807642
[patent_doc_number] => 12672565
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-06-30
[patent_title] => Package substrate and semiconductor package including the same
[patent_app_type] => utility
[patent_app_number] => 18/124653
[patent_app_country] => US
[patent_app_date] => 2023-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124653
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/124653 | Package substrate and semiconductor package including the same | Mar 21, 2023 | Issued |
Array
(
[id] => 19376653
[patent_doc_number] => 12068233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-20
[patent_title] => Adapter board and method for forming same, packaging method, and package structure
[patent_app_type] => utility
[patent_app_number] => 18/124069
[patent_app_country] => US
[patent_app_date] => 2023-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 10
[patent_no_of_words] => 9817
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124069
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/124069 | Adapter board and method for forming same, packaging method, and package structure | Mar 20, 2023 | Issued |