Search

Marina Annette Tietjen

Examiner (ID: 17491, Phone: (571)270-5422 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753, 3799
Total Applications
1026
Issued Applications
731
Pending Applications
46
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4270076 [patent_doc_number] => 06245643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method of removing polysilicon residual in a LOCOS isolation process using an etching selectivity solution' [patent_app_type] => 1 [patent_app_number] => 9/304013 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3234 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/245/06245643.pdf [firstpage_image] =>[orig_patent_app_number] => 304013 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/304013
Method of removing polysilicon residual in a LOCOS isolation process using an etching selectivity solution Apr 29, 1999 Issued
Array ( [id] => 7636659 [patent_doc_number] => 06379996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Package for semiconductor chip having thin recess portion and thick plane portion' [patent_app_type] => B1 [patent_app_number] => 09/291322 [patent_app_country] => US [patent_app_date] => 1999-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 3058 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/379/06379996.pdf [firstpage_image] =>[orig_patent_app_number] => 09291322 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/291322
Package for semiconductor chip having thin recess portion and thick plane portion Apr 14, 1999 Issued
Array ( [id] => 4348125 [patent_doc_number] => 06214695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/291043 [patent_app_country] => US [patent_app_date] => 1999-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 5413 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/214/06214695.pdf [firstpage_image] =>[orig_patent_app_number] => 291043 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/291043
Method of manufacturing semiconductor device Apr 13, 1999 Issued
Array ( [id] => 4302595 [patent_doc_number] => 06187637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Method for increasing isolation ability using shallow trench' [patent_app_type] => 1 [patent_app_number] => 9/277882 [patent_app_country] => US [patent_app_date] => 1999-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1035 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187637.pdf [firstpage_image] =>[orig_patent_app_number] => 277882 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/277882
Method for increasing isolation ability using shallow trench Mar 28, 1999 Issued
Array ( [id] => 4182632 [patent_doc_number] => 06159773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Strain release contact system for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 9/249252 [patent_app_country] => US [patent_app_date] => 1999-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2306 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159773.pdf [firstpage_image] =>[orig_patent_app_number] => 249252 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/249252
Strain release contact system for integrated circuits Feb 11, 1999 Issued
Array ( [id] => 4235189 [patent_doc_number] => 06143589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Tape under frame for conventional-type IC package assembly' [patent_app_type] => 1 [patent_app_number] => 9/244972 [patent_app_country] => US [patent_app_date] => 1999-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143589.pdf [firstpage_image] =>[orig_patent_app_number] => 244972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/244972
Tape under frame for conventional-type IC package assembly Feb 4, 1999 Issued
Array ( [id] => 4258370 [patent_doc_number] => 06204131 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Trench structure for isolating semiconductor elements and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/223471 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1648 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204131.pdf [firstpage_image] =>[orig_patent_app_number] => 223471 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223471
Trench structure for isolating semiconductor elements and method for forming the same Dec 29, 1998 Issued
Array ( [id] => 4245542 [patent_doc_number] => 06136633 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Trench-free buried contact for locos isolation' [patent_app_type] => 1 [patent_app_number] => 9/222272 [patent_app_country] => US [patent_app_date] => 1998-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1688 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136633.pdf [firstpage_image] =>[orig_patent_app_number] => 222272 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/222272
Trench-free buried contact for locos isolation Dec 27, 1998 Issued
Array ( [id] => 4377928 [patent_doc_number] => 06303461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method for fabricating a shallow trench isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/221203 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3016 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303461.pdf [firstpage_image] =>[orig_patent_app_number] => 221203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221203
Method for fabricating a shallow trench isolation structure Dec 22, 1998 Issued
Array ( [id] => 4366313 [patent_doc_number] => 06274455 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Method for isolating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/219529 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 2630 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274455.pdf [firstpage_image] =>[orig_patent_app_number] => 219529 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219529
Method for isolating semiconductor device Dec 22, 1998 Issued
Array ( [id] => 4358922 [patent_doc_number] => 06169002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Methods of forming trench isolation structures by etching back electrically insulating layers using etching masks' [patent_app_type] => 1 [patent_app_number] => 9/216192 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2031 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169002.pdf [firstpage_image] =>[orig_patent_app_number] => 216192 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/216192
Methods of forming trench isolation structures by etching back electrically insulating layers using etching masks Dec 17, 1998 Issued
Array ( [id] => 4249925 [patent_doc_number] => 06207516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Method of fabricating gate oxide layer with different thickness' [patent_app_type] => 1 [patent_app_number] => 9/215033 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1451 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207516.pdf [firstpage_image] =>[orig_patent_app_number] => 215033 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215033
Method of fabricating gate oxide layer with different thickness Dec 16, 1998 Issued
Array ( [id] => 4366882 [patent_doc_number] => 06274494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Method of protecting gate oxide' [patent_app_type] => 1 [patent_app_number] => 9/215632 [patent_app_country] => US [patent_app_date] => 1998-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1138 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/274/06274494.pdf [firstpage_image] =>[orig_patent_app_number] => 215632 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215632
Method of protecting gate oxide Dec 15, 1998 Issued
Array ( [id] => 4269968 [patent_doc_number] => 06245635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Method of fabricating shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/203042 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 4647 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/245/06245635.pdf [firstpage_image] =>[orig_patent_app_number] => 203042 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/203042
Method of fabricating shallow trench isolation Nov 29, 1998 Issued
Array ( [id] => 4154283 [patent_doc_number] => 06103581 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method for producing shallow trench isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/200552 [patent_app_country] => US [patent_app_date] => 1998-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 1435 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103581.pdf [firstpage_image] =>[orig_patent_app_number] => 200552 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/200552
Method for producing shallow trench isolation structure Nov 26, 1998 Issued
Array ( [id] => 4236658 [patent_doc_number] => 06090642 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Semiconductor laser diode assembly and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/196341 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4997 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/090/06090642.pdf [firstpage_image] =>[orig_patent_app_number] => 196341 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/196341
Semiconductor laser diode assembly and method of manufacturing the same Nov 18, 1998 Issued
Array ( [id] => 4420141 [patent_doc_number] => 06225171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Shallow trench isolation process for reduced for junction leakage' [patent_app_type] => 1 [patent_app_number] => 9/192521 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3008 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/225/06225171.pdf [firstpage_image] =>[orig_patent_app_number] => 192521 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192521
Shallow trench isolation process for reduced for junction leakage Nov 15, 1998 Issued
Array ( [id] => 4354266 [patent_doc_number] => 06218281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Semiconductor device with flip chip bonding pads and manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 9/192443 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 8276 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218281.pdf [firstpage_image] =>[orig_patent_app_number] => 192443 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192443
Semiconductor device with flip chip bonding pads and manufacture thereof Nov 15, 1998 Issued
Array ( [id] => 4275450 [patent_doc_number] => 06281081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Method of preventing current leakage around a shallow trench isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/192042 [patent_app_country] => US [patent_app_date] => 1998-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2284 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281081.pdf [firstpage_image] =>[orig_patent_app_number] => 192042 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/192042
Method of preventing current leakage around a shallow trench isolation structure Nov 12, 1998 Issued
Array ( [id] => 4084097 [patent_doc_number] => 06162700 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method of forming a trench isolation structure in a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 9/190803 [patent_app_country] => US [patent_app_date] => 1998-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2224 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162700.pdf [firstpage_image] =>[orig_patent_app_number] => 190803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/190803
Method of forming a trench isolation structure in a semiconductor substrate Nov 10, 1998 Issued
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