Search

Marina Annette Tietjen

Examiner (ID: 17491, Phone: (571)270-5422 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753, 3799
Total Applications
1026
Issued Applications
731
Pending Applications
46
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4271345 [patent_doc_number] => 06323105 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Method for fabricating an isolation structure including a shallow trench isolation structure and a local-oxidation isolation structure' [patent_app_type] => 1 [patent_app_number] => 9/188822 [patent_app_country] => US [patent_app_date] => 1998-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2632 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323105.pdf [firstpage_image] =>[orig_patent_app_number] => 188822 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/188822
Method for fabricating an isolation structure including a shallow trench isolation structure and a local-oxidation isolation structure Nov 8, 1998 Issued
Array ( [id] => 4303354 [patent_doc_number] => 06187692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Method for forming an insulating film' [patent_app_type] => 1 [patent_app_number] => 9/187112 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187692.pdf [firstpage_image] =>[orig_patent_app_number] => 187112 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187112
Method for forming an insulating film Nov 4, 1998 Issued
Array ( [id] => 4234066 [patent_doc_number] => 06074931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Process for recess-free planarization of shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/187302 [patent_app_country] => US [patent_app_date] => 1998-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 1967 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/074/06074931.pdf [firstpage_image] =>[orig_patent_app_number] => 187302 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/187302
Process for recess-free planarization of shallow trench isolation Nov 4, 1998 Issued
Array ( [id] => 4087691 [patent_doc_number] => 06133148 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Method of depositing film for semiconductor device in single wafer type apparatus using a lamp heating method' [patent_app_type] => 1 [patent_app_number] => 9/185093 [patent_app_country] => US [patent_app_date] => 1998-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3862 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/133/06133148.pdf [firstpage_image] =>[orig_patent_app_number] => 185093 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/185093
Method of depositing film for semiconductor device in single wafer type apparatus using a lamp heating method Nov 2, 1998 Issued
Array ( [id] => 4294473 [patent_doc_number] => 06197701 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'Lightly nitridation surface for preparing thin-gate oxides' [patent_app_type] => 1 [patent_app_number] => 9/177191 [patent_app_country] => US [patent_app_date] => 1998-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 5136 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/197/06197701.pdf [firstpage_image] =>[orig_patent_app_number] => 177191 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/177191
Lightly nitridation surface for preparing thin-gate oxides Oct 22, 1998 Issued
Array ( [id] => 4318360 [patent_doc_number] => 06248611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'LOC semiconductor assembled with room temperature adhesive' [patent_app_type] => 1 [patent_app_number] => 9/176967 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2885 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/248/06248611.pdf [firstpage_image] =>[orig_patent_app_number] => 176967 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/176967
LOC semiconductor assembled with room temperature adhesive Oct 21, 1998 Issued
Array ( [id] => 4259506 [patent_doc_number] => 06204203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-20 [patent_title] => 'Post deposition treatment of dielectric films for interface control' [patent_app_type] => 1 [patent_app_number] => 9/172582 [patent_app_country] => US [patent_app_date] => 1998-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6047 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/204/06204203.pdf [firstpage_image] =>[orig_patent_app_number] => 172582 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/172582
Post deposition treatment of dielectric films for interface control Oct 13, 1998 Issued
Array ( [id] => 4359209 [patent_doc_number] => 06169022 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Method of forming projection electrodes' [patent_app_type] => 1 [patent_app_number] => 9/168881 [patent_app_country] => US [patent_app_date] => 1998-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 6539 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169022.pdf [firstpage_image] =>[orig_patent_app_number] => 168881 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/168881
Method of forming projection electrodes Oct 8, 1998 Issued
Array ( [id] => 4101206 [patent_doc_number] => 06100112 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method of manufacturing a tape carrier with bump' [patent_app_type] => 1 [patent_app_number] => 9/167012 [patent_app_country] => US [patent_app_date] => 1998-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 39 [patent_no_of_words] => 8977 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/100/06100112.pdf [firstpage_image] =>[orig_patent_app_number] => 167012 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/167012
Method of manufacturing a tape carrier with bump Oct 5, 1998 Issued
Array ( [id] => 4188348 [patent_doc_number] => 06153480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-28 [patent_title] => 'Advanced trench sidewall oxide for shallow trench technology' [patent_app_type] => 1 [patent_app_number] => 9/164112 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 5266 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/153/06153480.pdf [firstpage_image] =>[orig_patent_app_number] => 164112 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164112
Advanced trench sidewall oxide for shallow trench technology Sep 29, 1998 Issued
Array ( [id] => 4312953 [patent_doc_number] => 06242345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Batch process for forming metal plugs in a dielectric layer of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/164393 [patent_app_country] => US [patent_app_date] => 1998-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1579 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/242/06242345.pdf [firstpage_image] =>[orig_patent_app_number] => 164393 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/164393
Batch process for forming metal plugs in a dielectric layer of a semiconductor wafer Sep 29, 1998 Issued
Array ( [id] => 4172137 [patent_doc_number] => 06083772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Method of mounting a power semiconductor die on a substrate' [patent_app_type] => 1 [patent_app_number] => 9/162002 [patent_app_country] => US [patent_app_date] => 1998-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3647 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/083/06083772.pdf [firstpage_image] =>[orig_patent_app_number] => 162002 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/162002
Method of mounting a power semiconductor die on a substrate Sep 27, 1998 Issued
Array ( [id] => 4294249 [patent_doc_number] => 06184106 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/157472 [patent_app_country] => US [patent_app_date] => 1998-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2184 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184106.pdf [firstpage_image] =>[orig_patent_app_number] => 157472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/157472
Method for manufacturing a semiconductor device Sep 20, 1998 Issued
Array ( [id] => 4139855 [patent_doc_number] => 06060403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Method of manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/154042 [patent_app_country] => US [patent_app_date] => 1998-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 75 [patent_no_of_words] => 13195 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/060/06060403.pdf [firstpage_image] =>[orig_patent_app_number] => 154042 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/154042
Method of manufacturing semiconductor device Sep 15, 1998 Issued
Array ( [id] => 4246619 [patent_doc_number] => 06136703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Methods for forming phosphorus- and/or boron-containing silica layers on substrates' [patent_app_type] => 1 [patent_app_number] => 9/146622 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4865 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136703.pdf [firstpage_image] =>[orig_patent_app_number] => 146622 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146622
Methods for forming phosphorus- and/or boron-containing silica layers on substrates Sep 2, 1998 Issued
Array ( [id] => 4271291 [patent_doc_number] => 06323101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Semiconductor processing methods, methods of forming silicon dioxide methods of forming trench isolation regions, and methods of forming interlevel dielectric layers' [patent_app_type] => 1 [patent_app_number] => 9/146843 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 3044 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323101.pdf [firstpage_image] =>[orig_patent_app_number] => 146843 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146843
Semiconductor processing methods, methods of forming silicon dioxide methods of forming trench isolation regions, and methods of forming interlevel dielectric layers Sep 2, 1998 Issued
Array ( [id] => 4117455 [patent_doc_number] => 06071831 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method of reducing spiral defects by adding an isopropyl alcohol rinse step before depositing sog' [patent_app_type] => 1 [patent_app_number] => 9/135042 [patent_app_country] => US [patent_app_date] => 1998-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071831.pdf [firstpage_image] =>[orig_patent_app_number] => 135042 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/135042
Method of reducing spiral defects by adding an isopropyl alcohol rinse step before depositing sog Aug 16, 1998 Issued
Array ( [id] => 4181838 [patent_doc_number] => 06150194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Semiconductor device sealed with resin, and its manufacture' [patent_app_type] => 1 [patent_app_number] => 9/117551 [patent_app_country] => US [patent_app_date] => 1998-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 6344 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150194.pdf [firstpage_image] =>[orig_patent_app_number] => 117551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/117551
Semiconductor device sealed with resin, and its manufacture Jul 29, 1998 Issued
Array ( [id] => 4152731 [patent_doc_number] => 06107119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Method for fabricating semiconductor components' [patent_app_type] => 1 [patent_app_number] => 9/110232 [patent_app_country] => US [patent_app_date] => 1998-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 27 [patent_no_of_words] => 4709 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107119.pdf [firstpage_image] =>[orig_patent_app_number] => 110232 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/110232
Method for fabricating semiconductor components Jul 5, 1998 Issued
Array ( [id] => 4235148 [patent_doc_number] => 06143586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Electrostatic protected substrate' [patent_app_type] => 1 [patent_app_number] => 9/097882 [patent_app_country] => US [patent_app_date] => 1998-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2090 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143586.pdf [firstpage_image] =>[orig_patent_app_number] => 097882 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/097882
Electrostatic protected substrate Jun 14, 1998 Issued
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