Marina Annette Tietjen
Examiner (ID: 17491, Phone: (571)270-5422 , Office: P/3753 )
Most Active Art Unit | 3753 |
Art Unit(s) | 3753, 3799 |
Total Applications | 1026 |
Issued Applications | 731 |
Pending Applications | 46 |
Abandoned Applications | 249 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4094113
[patent_doc_number] => 06096574
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-01
[patent_title] => 'Methods of making microelectronic corrections with liquid conductive elements'
[patent_app_type] => 1
[patent_app_number] => 9/052721
[patent_app_country] => US
[patent_app_date] => 1998-03-31
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[pdf_file] => patents/06/096/06096574.pdf
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Array
(
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[patent_issue_date] => 2001-11-06
[patent_title] => 'Method of field implantation'
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[patent_app_date] => 1998-03-26
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[pdf_file] => patents/06/313/06313006.pdf
[firstpage_image] =>[orig_patent_app_number] => 048637
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/048637 | Method of field implantation | Mar 25, 1998 | Issued |
Array
(
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[patent_issue_date] => 2000-04-18
[patent_title] => 'Semiconductor integrated circuit manufacturing method and device'
[patent_app_type] => 1
[patent_app_number] => 9/047593
[patent_app_country] => US
[patent_app_date] => 1998-03-25
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/047593 | Semiconductor integrated circuit manufacturing method and device | Mar 24, 1998 | Issued |
Array
(
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[patent_issue_date] => 2001-03-13
[patent_title] => 'Integrated circuit package architecture with a variable dispensed compound and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/047901
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[patent_app_date] => 1998-03-25
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Array
(
[id] => 4186399
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[patent_issue_date] => 2000-07-25
[patent_title] => 'Selective area halogen doping to achieve dual gate oxide thickness on a wafer'
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Array
(
[id] => 4238258
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[patent_issue_date] => 2000-06-27
[patent_title] => 'Metal attachment method and structure for attaching substrates at low temperatures'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/045324 | Metal attachment method and structure for attaching substrates at low temperatures | Mar 19, 1998 | Issued |
Array
(
[id] => 4153798
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[patent_title] => 'No clean flux for flip chip assembly'
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[patent_app_number] => 9/040643
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[patent_app_date] => 1998-03-17
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[firstpage_image] =>[orig_patent_app_number] => 040643
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/040643 | No clean flux for flip chip assembly | Mar 16, 1998 | Issued |
Array
(
[id] => 4154163
[patent_doc_number] => 06107215
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[patent_issue_date] => 2000-08-22
[patent_title] => 'Hydrogen plasma downstream treatment equipment and hydrogen plasma downstream treatment method'
[patent_app_type] => 1
[patent_app_number] => 9/041800
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[patent_app_date] => 1998-03-13
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[firstpage_image] =>[orig_patent_app_number] => 041800
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/041800 | Hydrogen plasma downstream treatment equipment and hydrogen plasma downstream treatment method | Mar 12, 1998 | Issued |
Array
(
[id] => 3934725
[patent_doc_number] => 05972739
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Method of manufacturing a tab semiconductor device'
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[patent_app_number] => 9/041592
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/041592 | Method of manufacturing a tab semiconductor device | Mar 12, 1998 | Issued |
Array
(
[id] => 4182535
[patent_doc_number] => 06159766
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[patent_issue_date] => 2000-12-12
[patent_title] => 'Designing method of leadframe tip arrangement'
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[patent_app_number] => 9/037963
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[firstpage_image] =>[orig_patent_app_number] => 037963
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Array
(
[id] => 4080589
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[patent_issue_date] => 2000-04-25
[patent_title] => 'Low cost ball grid array device and method of manufacture thereof'
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[firstpage_image] =>[orig_patent_app_number] => 026781
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/026781 | Low cost ball grid array device and method of manufacture thereof | Feb 19, 1998 | Issued |
Array
(
[id] => 3944048
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[patent_title] => 'Dual damascene process for multi-level metallization and interconnection structure'
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Array
(
[id] => 4246410
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[patent_title] => 'In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications'
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Array
(
[id] => 4153821
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[patent_title] => 'Completely removal of TiN residue on dual damascence process'
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Array
(
[id] => 4302063
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Array
(
[id] => 4090128
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[patent_title] => 'Methods of making semiconductor assemblies with reinforced peripheral regions'
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Array
(
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Array
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Array
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Array
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