Search

Marina Annette Tietjen

Examiner (ID: 17491, Phone: (571)270-5422 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753, 3799
Total Applications
1026
Issued Applications
731
Pending Applications
46
Abandoned Applications
249

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4094113 [patent_doc_number] => 06096574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Methods of making microelectronic corrections with liquid conductive elements' [patent_app_type] => 1 [patent_app_number] => 9/052721 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 12720 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/096/06096574.pdf [firstpage_image] =>[orig_patent_app_number] => 052721 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/052721
Methods of making microelectronic corrections with liquid conductive elements Mar 30, 1998 Issued
Array ( [id] => 4329162 [patent_doc_number] => 06313006 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Method of field implantation' [patent_app_type] => 1 [patent_app_number] => 9/048637 [patent_app_country] => US [patent_app_date] => 1998-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1564 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313006.pdf [firstpage_image] =>[orig_patent_app_number] => 048637 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/048637
Method of field implantation Mar 25, 1998 Issued
Array ( [id] => 4102990 [patent_doc_number] => 06051509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Semiconductor integrated circuit manufacturing method and device' [patent_app_type] => 1 [patent_app_number] => 9/047593 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 12529 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/051/06051509.pdf [firstpage_image] =>[orig_patent_app_number] => 047593 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047593
Semiconductor integrated circuit manufacturing method and device Mar 24, 1998 Issued
Array ( [id] => 4354115 [patent_doc_number] => 06200828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Integrated circuit package architecture with a variable dispensed compound and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/047901 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2155 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/200/06200828.pdf [firstpage_image] =>[orig_patent_app_number] => 047901 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047901
Integrated circuit package architecture with a variable dispensed compound and method of manufacturing the same Mar 24, 1998 Issued
Array ( [id] => 4186399 [patent_doc_number] => 06093659 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Selective area halogen doping to achieve dual gate oxide thickness on a wafer' [patent_app_type] => 1 [patent_app_number] => 9/047713 [patent_app_country] => US [patent_app_date] => 1998-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1843 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/093/06093659.pdf [firstpage_image] =>[orig_patent_app_number] => 047713 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/047713
Selective area halogen doping to achieve dual gate oxide thickness on a wafer Mar 24, 1998 Issued
Array ( [id] => 4238258 [patent_doc_number] => 06080640 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Metal attachment method and structure for attaching substrates at low temperatures' [patent_app_type] => 1 [patent_app_number] => 9/045324 [patent_app_country] => US [patent_app_date] => 1998-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 5658 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/080/06080640.pdf [firstpage_image] =>[orig_patent_app_number] => 045324 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/045324
Metal attachment method and structure for attaching substrates at low temperatures Mar 19, 1998 Issued
Array ( [id] => 4153798 [patent_doc_number] => 06103549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'No clean flux for flip chip assembly' [patent_app_type] => 1 [patent_app_number] => 9/040643 [patent_app_country] => US [patent_app_date] => 1998-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 3911 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103549.pdf [firstpage_image] =>[orig_patent_app_number] => 040643 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/040643
No clean flux for flip chip assembly Mar 16, 1998 Issued
Array ( [id] => 4154163 [patent_doc_number] => 06107215 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Hydrogen plasma downstream treatment equipment and hydrogen plasma downstream treatment method' [patent_app_type] => 1 [patent_app_number] => 9/041800 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4464 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107215.pdf [firstpage_image] =>[orig_patent_app_number] => 041800 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041800
Hydrogen plasma downstream treatment equipment and hydrogen plasma downstream treatment method Mar 12, 1998 Issued
Array ( [id] => 3934725 [patent_doc_number] => 05972739 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Method of manufacturing a tab semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/041592 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/972/05972739.pdf [firstpage_image] =>[orig_patent_app_number] => 041592 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041592
Method of manufacturing a tab semiconductor device Mar 12, 1998 Issued
Array ( [id] => 4182535 [patent_doc_number] => 06159766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Designing method of leadframe tip arrangement' [patent_app_type] => 1 [patent_app_number] => 9/037963 [patent_app_country] => US [patent_app_date] => 1998-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3787 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159766.pdf [firstpage_image] =>[orig_patent_app_number] => 037963 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037963
Designing method of leadframe tip arrangement Mar 10, 1998 Issued
Array ( [id] => 4080589 [patent_doc_number] => 06054338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Low cost ball grid array device and method of manufacture thereof' [patent_app_type] => 1 [patent_app_number] => 9/026781 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 15 [patent_no_of_words] => 2269 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054338.pdf [firstpage_image] =>[orig_patent_app_number] => 026781 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/026781
Low cost ball grid array device and method of manufacture thereof Feb 19, 1998 Issued
Array ( [id] => 3944048 [patent_doc_number] => 05976967 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Dual damascene process for multi-level metallization and interconnection structure' [patent_app_type] => 1 [patent_app_number] => 9/023261 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2657 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/976/05976967.pdf [firstpage_image] =>[orig_patent_app_number] => 023261 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023261
Dual damascene process for multi-level metallization and interconnection structure Feb 12, 1998 Issued
Array ( [id] => 4246410 [patent_doc_number] => 06136690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications' [patent_app_type] => 1 [patent_app_number] => 9/023523 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5178 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136690.pdf [firstpage_image] =>[orig_patent_app_number] => 023523 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023523
In situ plasma pre-deposition wafer treatment in chemical vapor deposition technology for semiconductor integrated circuit applications Feb 12, 1998 Issued
Array ( [id] => 4153821 [patent_doc_number] => 06107193 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Completely removal of TiN residue on dual damascence process' [patent_app_type] => 1 [patent_app_number] => 9/022840 [patent_app_country] => US [patent_app_date] => 1998-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1526 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/107/06107193.pdf [firstpage_image] =>[orig_patent_app_number] => 022840 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/022840
Completely removal of TiN residue on dual damascence process Feb 11, 1998 Issued
Array ( [id] => 4302063 [patent_doc_number] => 06187601 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-13 [patent_title] => 'Plastic encapsulated IC package and method of designing same' [patent_app_type] => 1 [patent_app_number] => 9/021732 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 3868 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/187/06187601.pdf [firstpage_image] =>[orig_patent_app_number] => 021732 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021732
Plastic encapsulated IC package and method of designing same Feb 10, 1998 Issued
Array ( [id] => 4090128 [patent_doc_number] => 05966587 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Methods of making semiconductor assemblies with reinforced peripheral regions' [patent_app_type] => 1 [patent_app_number] => 9/020613 [patent_app_country] => US [patent_app_date] => 1998-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5556 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/966/05966587.pdf [firstpage_image] =>[orig_patent_app_number] => 020613 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020613
Methods of making semiconductor assemblies with reinforced peripheral regions Feb 8, 1998 Issued
Array ( [id] => 4132184 [patent_doc_number] => 06121160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Manufacturing method for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/019505 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 2830 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121160.pdf [firstpage_image] =>[orig_patent_app_number] => 019505 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019505
Manufacturing method for semiconductor device Feb 5, 1998 Issued
Array ( [id] => 4191188 [patent_doc_number] => 06043135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Process of fabricating a semiconductor device having trench isolation allowing pattern image to be exactly transferred to photo-resist layer extending thereon' [patent_app_type] => 1 [patent_app_number] => 9/019442 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 37 [patent_no_of_words] => 4448 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/043/06043135.pdf [firstpage_image] =>[orig_patent_app_number] => 019442 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019442
Process of fabricating a semiconductor device having trench isolation allowing pattern image to be exactly transferred to photo-resist layer extending thereon Feb 4, 1998 Issued
Array ( [id] => 4214927 [patent_doc_number] => 06087199 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Method for fabricating a very dense chip package' [patent_app_type] => 1 [patent_app_number] => 9/018737 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 8345 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087199.pdf [firstpage_image] =>[orig_patent_app_number] => 018737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018737
Method for fabricating a very dense chip package Feb 3, 1998 Issued
Array ( [id] => 4029153 [patent_doc_number] => 05994165 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method for mounting a semiconductor chip' [patent_app_type] => 1 [patent_app_number] => 9/017863 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2308 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994165.pdf [firstpage_image] =>[orig_patent_app_number] => 017863 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017863
Method for mounting a semiconductor chip Feb 2, 1998 Issued
Menu