Search

Mark A. Chapman

Examiner (ID: 19279, Phone: (571)272-1381 , Office: P/1721 )

Most Active Art Unit
1753
Art Unit(s)
1754, 1737, 1721, 1507, 1756, 1795, 1753
Total Applications
2639
Issued Applications
2313
Pending Applications
101
Abandoned Applications
234

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18111644 [patent_doc_number] => 20230004524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => METHOD OF NOTIFYING A PROCESS OR PROGRAMMABLE ATOMIC OPERATION TRAPS [patent_app_type] => utility [patent_app_number] => 17/901480 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901480 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901480
Method of notifying a process or programmable atomic operation traps Aug 31, 2022 Issued
Array ( [id] => 18111506 [patent_doc_number] => 20230004386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => NEURAL NETWORK COMPUTE TILE [patent_app_type] => utility [patent_app_number] => 17/892807 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9838 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892807 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892807
Neural network compute tile Aug 21, 2022 Issued
Array ( [id] => 18023196 [patent_doc_number] => 20220374695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PERFORMANCE ESTIMATION-BASED RESOURCE ALLOCATION FOR RECONFIGURABLE ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 17/883407 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12349 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/883407
Performance estimation-based resource allocation for reconfigurable architectures Aug 7, 2022 Issued
Array ( [id] => 19078599 [patent_doc_number] => 11947967 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Reconfigurable processing-in-memory logic using look-up tables [patent_app_type] => utility [patent_app_number] => 17/878609 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878609 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878609
Reconfigurable processing-in-memory logic using look-up tables Jul 31, 2022 Issued
Array ( [id] => 18023194 [patent_doc_number] => 20220374693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHOD AND APPARATUS WITH DATA PROCESSING [patent_app_type] => utility [patent_app_number] => 17/876136 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876136 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876136
Method and apparatus with data processing Jul 27, 2022 Issued
Array ( [id] => 18856182 [patent_doc_number] => 11853766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Technology to learn and offload common patterns of memory access and computation [patent_app_type] => utility [patent_app_number] => 17/872927 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9985 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17872927 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/872927
Technology to learn and offload common patterns of memory access and computation Jul 24, 2022 Issued
Array ( [id] => 17984563 [patent_doc_number] => 20220350600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICE [patent_app_type] => utility [patent_app_number] => 17/865903 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865903 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865903
Processing-in-memory (PIM) device Jul 14, 2022 Issued
Array ( [id] => 17984562 [patent_doc_number] => 20220350599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => PROCESSING-IN-MEMORY (PIM) DEVICES [patent_app_type] => utility [patent_app_number] => 17/865148 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865148 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865148
Processing-in-memory (PIM) devices Jul 13, 2022 Issued
Array ( [id] => 19078122 [patent_doc_number] => 11947487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Enabling accelerated processing units to perform dataflow execution [patent_app_type] => utility [patent_app_number] => 17/852306 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852306 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852306
Enabling accelerated processing units to perform dataflow execution Jun 27, 2022 Issued
Array ( [id] => 18023275 [patent_doc_number] => 20220374774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ARCHITECTURE TO SUPPORT SYNCHRONIZATION BETWEEN CORE AND INFERENCE ENGINE FOR MACHINE LEARNING [patent_app_type] => utility [patent_app_number] => 17/849991 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849991
Architecture to support synchronization between core and inference engine for machine learning Jun 26, 2022 Issued
Array ( [id] => 18686943 [patent_doc_number] => 11782679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Multiplexing between different processing channels [patent_app_type] => utility [patent_app_number] => 17/844169 [patent_app_country] => US [patent_app_date] => 2022-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 17597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17844169 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/844169
Multiplexing between different processing channels Jun 19, 2022 Issued
Array ( [id] => 17869187 [patent_doc_number] => 20220291924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => CALCULATION ENGINE FOR PERFORMING CALCULATIONS BASED ON DEPENDENCIES IN A SELF-DESCRIBING DATA SYSTEM [patent_app_type] => utility [patent_app_number] => 17/825816 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825816
Calculation engine for performing calculations based on dependencies in a self-describing data system May 25, 2022 Issued
Array ( [id] => 18734777 [patent_doc_number] => 11803509 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-10-31 [patent_title] => Parallel merge sorter circuit [patent_app_type] => utility [patent_app_number] => 17/664632 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 17772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664632 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/664632
Parallel merge sorter circuit May 22, 2022 Issued
Array ( [id] => 17832205 [patent_doc_number] => 20220269509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => GENERATING AND EXECUTING A CONTROL FLOW [patent_app_type] => utility [patent_app_number] => 17/743062 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/743062
Generating and executing a control flow May 11, 2022 Issued
Array ( [id] => 18890024 [patent_doc_number] => 11868797 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Methods and systems for converting a related group of physical machines to virtual machines [patent_app_type] => utility [patent_app_number] => 17/733717 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733717 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/733717
Methods and systems for converting a related group of physical machines to virtual machines Apr 28, 2022 Issued
Array ( [id] => 17778530 [patent_doc_number] => 20220244880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => QUICK CLEARING OF REGISTERS [patent_app_type] => utility [patent_app_number] => 17/722477 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17722477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/722477
Quick clearing of registers Apr 17, 2022 Issued
Array ( [id] => 18638201 [patent_doc_number] => 11762803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Multiple accumulate busses in a systolic array [patent_app_type] => utility [patent_app_number] => 17/659642 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 36514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659642 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659642
Multiple accumulate busses in a systolic array Apr 17, 2022 Issued
Array ( [id] => 17931833 [patent_doc_number] => 20220326958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => LOOK-UP TABLE CONTAINING PROCESSOR-IN-MEMORY CLUSTER FOR DATA-INTENSIVE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/717947 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717947 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717947
Look-up table containing processor-in-memory cluster for data-intensive applications Apr 10, 2022 Issued
Array ( [id] => 18678030 [patent_doc_number] => 20230315677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => BROADCAST HUB FOR MULTI-PROCESSOR ARRANGEMENT [patent_app_type] => utility [patent_app_number] => 17/709255 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17709255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/709255
Broadcast hub for multi-processor arrangement Mar 29, 2022 Issued
Array ( [id] => 17736619 [patent_doc_number] => 20220222078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => Securing Conditional Speculative Instruction Execution [patent_app_type] => utility [patent_app_number] => 17/707278 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3706 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17707278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/707278
Securing conditional speculative instruction execution Mar 28, 2022 Issued
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