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Mark A. Giardino Jr.

Examiner (ID: 12975, Phone: (571)270-3565 , Office: P/2135 )

Most Active Art Unit
2135
Art Unit(s)
4113, 2185, 2135
Total Applications
773
Issued Applications
636
Pending Applications
43
Abandoned Applications
108

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19052959 [patent_doc_number] => 20240094928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SOLID STATE DRIVES WITH IMPROVED FORMAT HANDLING [patent_app_type] => utility [patent_app_number] => 17/948013 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948013 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948013
Solid state drives with improved format handling Sep 18, 2022 Issued
Array ( [id] => 18531667 [patent_doc_number] => 20230236739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => CACHE-ASSISTED ROW HAMMER MITIGATION [patent_app_type] => utility [patent_app_number] => 17/941551 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11159 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941551 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941551
Cache-assisted row hammer mitigation Sep 8, 2022 Issued
Array ( [id] => 18531896 [patent_doc_number] => 20230236968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => MEMORY MEDIA ROW ACTIVATION-BIASED CACHING [patent_app_type] => utility [patent_app_number] => 17/941558 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941558
Memory media row activation-biased caching Sep 8, 2022 Issued
Array ( [id] => 19015082 [patent_doc_number] => 11922014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Memory system and method [patent_app_type] => utility [patent_app_number] => 17/903636 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903636
Memory system and method Sep 5, 2022 Issued
Array ( [id] => 19152858 [patent_doc_number] => 11977769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Control of back pressure based on a total number of buffered read and write entries [patent_app_type] => utility [patent_app_number] => 17/903716 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10888 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903716 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903716
Control of back pressure based on a total number of buffered read and write entries Sep 5, 2022 Issued
Array ( [id] => 18095426 [patent_doc_number] => 20220413767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM [patent_app_type] => utility [patent_app_number] => 17/822806 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822806 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822806
INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND INFORMATION PROCESSING PROGRAM Aug 28, 2022 Abandoned
Array ( [id] => 19005700 [patent_doc_number] => 20240069771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => READ OPERATIONS FOR MIXED DATA [patent_app_type] => utility [patent_app_number] => 17/822893 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15332 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822893 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822893
Read operations for mixed data Aug 28, 2022 Issued
Array ( [id] => 18989628 [patent_doc_number] => 20240061597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SINGLE-LEVEL CELL BLOCK STORING DATA FOR MIGRATION TO MULTIPLE MULTI-LEVEL CELL BLOCKS [patent_app_type] => utility [patent_app_number] => 17/820762 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17820762 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/820762
Single-level cell block storing data for migration to multiple multi-level cell blocks Aug 17, 2022 Issued
Array ( [id] => 19313373 [patent_doc_number] => 12039187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Power-down test of firmware of a memory system [patent_app_type] => utility [patent_app_number] => 17/883373 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4437 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17883373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/883373
Power-down test of firmware of a memory system Aug 7, 2022 Issued
Array ( [id] => 18803228 [patent_doc_number] => 11836386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Storage system and method of controlling storage system that set ports associated with a logical unit [patent_app_type] => utility [patent_app_number] => 17/881945 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 10860 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881945
Storage system and method of controlling storage system that set ports associated with a logical unit Aug 4, 2022 Issued
Array ( [id] => 18941590 [patent_doc_number] => 20240036729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => Efficient Sub-Block Erasing [patent_app_type] => utility [patent_app_number] => 17/878490 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878490 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878490
Efficient Sub-Block Erasing Jul 31, 2022 Pending
Array ( [id] => 19152872 [patent_doc_number] => 11977783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Method and apparatus for performing data access control of memory device with aid of predetermined command [patent_app_type] => utility [patent_app_number] => 17/864449 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9942 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 336 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/864449
Method and apparatus for performing data access control of memory device with aid of predetermined command Jul 13, 2022 Issued
Array ( [id] => 20481671 [patent_doc_number] => 12530146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Toggling known patterns for reading memory cells in a memory device [patent_app_type] => utility [patent_app_number] => 17/861680 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 10959 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861680 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/861680
Toggling known patterns for reading memory cells in a memory device Jul 10, 2022 Issued
Array ( [id] => 19899415 [patent_doc_number] => 12277339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor storage apparatus and semiconductor system for emulating erasing operation of flash memory [patent_app_type] => utility [patent_app_number] => 17/861257 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/861257
Semiconductor storage apparatus and semiconductor system for emulating erasing operation of flash memory Jul 10, 2022 Issued
Array ( [id] => 18592225 [patent_doc_number] => 11741125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Storage network for rebuilding failed slices [patent_app_type] => utility [patent_app_number] => 17/810928 [patent_app_country] => US [patent_app_date] => 2022-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810928 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/810928
Storage network for rebuilding failed slices Jul 5, 2022 Issued
Array ( [id] => 17947740 [patent_doc_number] => 20220334759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => DATA TRANSFER MANAGEMENT WITHIN A MEMORY DEVICE HAVING MULTIPLE MEMORY REGIONS WITH DIFFERENT MEMORY DENSITIES [patent_app_type] => utility [patent_app_number] => 17/855579 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855579
Data transfer management within a memory device having multiple memory regions with different memory densities Jun 29, 2022 Issued
Array ( [id] => 17984463 [patent_doc_number] => 20220350500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => EMBEDDED CONTROLLER AND MEMORY TO STORE MEMORY ERROR INFORMATION [patent_app_type] => utility [patent_app_number] => 17/855688 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855688 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855688
EMBEDDED CONTROLLER AND MEMORY TO STORE MEMORY ERROR INFORMATION Jun 29, 2022 Pending
Array ( [id] => 17899370 [patent_doc_number] => 20220309032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => ARCHIVING DATA OBJECTS USING SECONDARY COPIES [patent_app_type] => utility [patent_app_number] => 17/841575 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841575 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/841575
Archiving data objects using secondary copies Jun 14, 2022 Issued
Array ( [id] => 18819437 [patent_doc_number] => 20230393777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => DYNAMIC READ LEVEL TRIM SELECTION FOR SCAN OPERATIONS OF MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/830802 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830802 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830802
Dynamic read level trim selection for scan operations of memory devices Jun 1, 2022 Issued
Array ( [id] => 17869102 [patent_doc_number] => 20220291839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => Host Load Based Dynamic Storage System for Configuration for Increased Performance [patent_app_type] => utility [patent_app_number] => 17/831343 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6630 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/831343
Host load based dynamic storage system for configuration for increased performance Jun 1, 2022 Issued
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