
Mark Booker
Examiner (ID: 8590)
| Most Active Art Unit | 2921 |
| Art Unit(s) | 2921 |
| Total Applications | 1202 |
| Issued Applications | 1192 |
| Pending Applications | 0 |
| Abandoned Applications | 6 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4215011
[patent_doc_number] => 06087205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Method of fabricating staggered thin film transistor with an improved ohmic contact structure'
[patent_app_type] => 1
[patent_app_number] => 8/985875
[patent_app_country] => US
[patent_app_date] => 1997-12-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/087/06087205.pdf
[firstpage_image] =>[orig_patent_app_number] => 985875
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Array
(
[id] => 3999324
[patent_doc_number] => 05950075
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Semiconductor device having recessed gate regions and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/955818
[patent_app_country] => US
[patent_app_date] => 1997-10-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/950/05950075.pdf
[firstpage_image] =>[orig_patent_app_number] => 955818
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/955818 | Semiconductor device having recessed gate regions and method of manufacturing the same | Oct 21, 1997 | Issued |
Array
(
[id] => 3896850
[patent_doc_number] => 05897381
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-27
[patent_title] => 'Method of forming a layer and semiconductor substrate'
[patent_app_type] => 1
[patent_app_number] => 8/955384
[patent_app_country] => US
[patent_app_date] => 1997-10-21
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[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/897/05897381.pdf
[firstpage_image] =>[orig_patent_app_number] => 955384
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/955384 | Method of forming a layer and semiconductor substrate | Oct 20, 1997 | Issued |
Array
(
[id] => 4218614
[patent_doc_number] => 06040201
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-21
[patent_title] => 'Method of manufacturing thin film diode'
[patent_app_type] => 1
[patent_app_number] => 8/931972
[patent_app_country] => US
[patent_app_date] => 1997-09-15
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/040/06040201.pdf
[firstpage_image] =>[orig_patent_app_number] => 931972
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/931972 | Method of manufacturing thin film diode | Sep 14, 1997 | Issued |
Array
(
[id] => 4087326
[patent_doc_number] => 06133123
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-17
[patent_title] => 'Fabrication of semiconductor gettering structures by ion implantation'
[patent_app_type] => 1
[patent_app_number] => 8/916940
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[patent_app_date] => 1997-08-21
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[pdf_file] => patents/06/133/06133123.pdf
[firstpage_image] =>[orig_patent_app_number] => 916940
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/916940 | Fabrication of semiconductor gettering structures by ion implantation | Aug 20, 1997 | Issued |
Array
(
[id] => 3941368
[patent_doc_number] => 05989946
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-23
[patent_title] => 'Method of forming SRAM cells and pairs of field effect transistors'
[patent_app_type] => 1
[patent_app_number] => 8/914369
[patent_app_country] => US
[patent_app_date] => 1997-08-19
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[pdf_file] => patents/05/989/05989946.pdf
[firstpage_image] =>[orig_patent_app_number] => 914369
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/914369 | Method of forming SRAM cells and pairs of field effect transistors | Aug 18, 1997 | Issued |
Array
(
[id] => 4084285
[patent_doc_number] => 06025210
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-15
[patent_title] => 'Solid-state imaging device and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/900846
[patent_app_country] => US
[patent_app_date] => 1997-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/06/025/06025210.pdf
[firstpage_image] =>[orig_patent_app_number] => 900846
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/900846 | Solid-state imaging device and method of manufacturing the same | Jul 24, 1997 | Issued |
Array
(
[id] => 4377865
[patent_doc_number] => 06303457
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Integrated circuit having integral decoupling capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/890047
[patent_app_country] => US
[patent_app_date] => 1997-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/06/303/06303457.pdf
[firstpage_image] =>[orig_patent_app_number] => 890047
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/890047 | Integrated circuit having integral decoupling capacitor | Jul 8, 1997 | Issued |
Array
(
[id] => 3936816
[patent_doc_number] => 05915172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-22
[patent_title] => 'Method for manufacturing LCD and TFT'
[patent_app_type] => 1
[patent_app_number] => 8/889322
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[pdf_file] => patents/05/915/05915172.pdf
[firstpage_image] =>[orig_patent_app_number] => 889322
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/889322 | Method for manufacturing LCD and TFT | Jul 7, 1997 | Issued |
Array
(
[id] => 4050616
[patent_doc_number] => 05943583
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-24
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/887702
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[patent_app_date] => 1997-07-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/943/05943583.pdf
[firstpage_image] =>[orig_patent_app_number] => 887702
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/887702 | Method for manufacturing semiconductor device | Jul 2, 1997 | Issued |
Array
(
[id] => 3968842
[patent_doc_number] => 05904519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-18
[patent_title] => 'Method of manufacturing Bi-CMOS'
[patent_app_type] => 1
[patent_app_number] => 8/879320
[patent_app_country] => US
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[pdf_file] => patents/05/904/05904519.pdf
[firstpage_image] =>[orig_patent_app_number] => 879320
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/879320 | Method of manufacturing Bi-CMOS | Jun 18, 1997 | Issued |
Array
(
[id] => 3937059
[patent_doc_number] => 05981320
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-09
[patent_title] => 'Method of fabricating cmosfet'
[patent_app_type] => 1
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[pdf_file] => patents/05/981/05981320.pdf
[firstpage_image] =>[orig_patent_app_number] => 873716
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873716 | Method of fabricating cmosfet | Jun 11, 1997 | Issued |
Array
(
[id] => 4234867
[patent_doc_number] => 06165823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Thin film transistor and a fabricating method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/873300
[patent_app_country] => US
[patent_app_date] => 1997-06-11
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[pdf_file] => patents/06/165/06165823.pdf
[firstpage_image] =>[orig_patent_app_number] => 873300
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/873300 | Thin film transistor and a fabricating method therefor | Jun 10, 1997 | Issued |
| 08/867407 | METHOD OF FORMING PARA -DIELECTRIC AND FERRO- DIELECTRIC CAPACITORS OVER A SILICON SUBSTRATE | Jun 1, 1997 | Abandoned |
| 08/865706 | METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE | May 29, 1997 | Abandoned |
Array
(
[id] => 4011896
[patent_doc_number] => 05879969
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Semiconductor device and method for forming the same'
[patent_app_type] => 1
[patent_app_number] => 8/841638
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 841638
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/841638 | Semiconductor device and method for forming the same | Apr 29, 1997 | Issued |
Array
(
[id] => 4141565
[patent_doc_number] => 06030864
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-02-29
[patent_title] => 'Vertical NPN transistor for 0.35 micrometer node CMOS logic technology'
[patent_app_type] => 1
[patent_app_number] => 8/838840
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 838840
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/838840 | Vertical NPN transistor for 0.35 micrometer node CMOS logic technology | Apr 10, 1997 | Issued |
| 08/727510 | PROCESS FOR PASSIVATING THE SIDES OF A THIN-FILM SEMICONDUCTOR COMPONENT | Mar 27, 1997 | Abandoned |
Array
(
[id] => 3957637
[patent_doc_number] => 05930647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Methods of forming field oxide and active area regions on a semiconductive substrate'
[patent_app_type] => 1
[patent_app_number] => 8/807296
[patent_app_country] => US
[patent_app_date] => 1997-02-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/930/05930647.pdf
[firstpage_image] =>[orig_patent_app_number] => 807296
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/807296 | Methods of forming field oxide and active area regions on a semiconductive substrate | Feb 26, 1997 | Issued |
Array
(
[id] => 4058659
[patent_doc_number] => 05913113
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Method for fabricating a thin film transistor of a liquid crystal display device'
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[patent_app_number] => 8/805386
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/805386 | Method for fabricating a thin film transistor of a liquid crystal display device | Feb 23, 1997 | Issued |