Search

Mark L Greene

Examiner (ID: 10512, Phone: (571)270-7555 , Office: P/3744 )

Most Active Art Unit
3747
Art Unit(s)
3744, 3747
Total Applications
348
Issued Applications
225
Pending Applications
38
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18906207 [patent_doc_number] => 20240021692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => METHOD AND RELATED APPARATUS FOR INTEGRATING ELECTRONIC MEMORY IN AN INTEGRATED CHIP [patent_app_type] => utility [patent_app_number] => 18/364011 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15055 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364011 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364011
METHOD AND RELATED APPARATUS FOR INTEGRATING ELECTRONIC MEMORY IN AN INTEGRATED CHIP Aug 1, 2023 Pending
Array ( [id] => 18776425 [patent_doc_number] => 20230371263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => FeRAM MFM STRUCTURE WITH SELECTIVE ELECTRODE ETCH [patent_app_type] => utility [patent_app_number] => 18/357240 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11488 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357240
FeRAM MFM STRUCTURE WITH SELECTIVE ELECTRODE ETCH Jul 23, 2023 Pending
Array ( [id] => 18540993 [patent_doc_number] => 20230246105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => SEMICONDUCTOR DEVICE WITH CONTACT PLUGS [patent_app_type] => utility [patent_app_number] => 18/191538 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191538 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191538
Semiconductor device with contact plugs Mar 27, 2023 Issued
Array ( [id] => 18502338 [patent_doc_number] => 20230225217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => METHOD OF INTEGRATION OF A MAGNETORESISTIVE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/185003 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185003 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185003
METHOD OF INTEGRATION OF A MAGNETORESISTIVE STRUCTURE Mar 15, 2023 Pending
Array ( [id] => 18311119 [patent_doc_number] => 20230115019 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => HYBRID SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/066511 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18066511 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/066511
HYBRID SEMICONDUCTOR DEVICE Dec 14, 2022 Pending
Array ( [id] => 18279381 [patent_doc_number] => 20230094853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DISHING PREVENTION STRUCTURE EMBEDDED IN A GATE ELECTRODE [patent_app_type] => utility [patent_app_number] => 18/076679 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076679 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076679
DISHING PREVENTION STRUCTURE EMBEDDED IN A GATE ELECTRODE Dec 6, 2022 Pending
Array ( [id] => 18254754 [patent_doc_number] => 20230081793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/056954 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10351 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056954
SEMICONDUCTOR DEVICE Nov 17, 2022 Pending
Array ( [id] => 18258477 [patent_doc_number] => 20230085517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => HEMT AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/988720 [patent_app_country] => US [patent_app_date] => 2022-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17988720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/988720
HEMT and method of fabricating the same Nov 15, 2022 Issued
Array ( [id] => 18209739 [patent_doc_number] => 20230055999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SiC EPITAXIAL WAFER, AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/981138 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981138 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981138
SiC EPITAXIAL WAFER, AND METHOD OF MANUFACTURING THE SAME Nov 3, 2022 Pending
Array ( [id] => 18196966 [patent_doc_number] => 20230050485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DEVICE TOPOLOGY FOR LATERAL POWER TRANSISTORS WITH LOW COMMON SOURCE INDUCTANCE [patent_app_type] => utility [patent_app_number] => 17/974880 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974880 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974880
DEVICE TOPOLOGY FOR LATERAL POWER TRANSISTORS WITH LOW COMMON SOURCE INDUCTANCE Oct 26, 2022 Pending
Array ( [id] => 18891203 [patent_doc_number] => 11869982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Single sided channel mesa power junction field effect transistor [patent_app_type] => utility [patent_app_number] => 17/975356 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9713 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17975356 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/975356
Single sided channel mesa power junction field effect transistor Oct 26, 2022 Issued
Array ( [id] => 18197061 [patent_doc_number] => 20230050580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DEVICE TOPOLOGIES FOR HIGH CURRENT LATERAL POWER SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/974794 [patent_app_country] => US [patent_app_date] => 2022-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974794
DEVICE TOPOLOGIES FOR HIGH CURRENT LATERAL POWER SEMICONDUCTOR DEVICES Oct 26, 2022 Pending
Array ( [id] => 18195520 [patent_doc_number] => 20230049039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/974130 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974130
Semiconductor device Oct 25, 2022 Issued
Array ( [id] => 18145913 [patent_doc_number] => 20230019769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SEMICONDUCTOR DEVICE WITH SiC SEMICONDUCTOR LAYER AND RAISED PORTION GROUP [patent_app_type] => utility [patent_app_number] => 17/954049 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954049
SEMICONDUCTOR DEVICE WITH SiC SEMICONDUCTOR LAYER AND RAISED PORTION GROUP Sep 26, 2022 Pending
Array ( [id] => 18208765 [patent_doc_number] => 20230055024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE [patent_app_type] => utility [patent_app_number] => 17/931770 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17931770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/931770
SIC MOSFET WITH BUILT-IN SCHOTTKY DIODE Sep 12, 2022 Pending
Array ( [id] => 18113099 [patent_doc_number] => 20230005979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/939796 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939796 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939796
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF Sep 6, 2022 Pending
Array ( [id] => 18040238 [patent_doc_number] => 20220384455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => INTEGRATED CIRCUIT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/885166 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885166 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885166
INTEGRATED CIRCUIT STRUCTURE Aug 9, 2022 Pending
Array ( [id] => 18024591 [patent_doc_number] => 20220376090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Conformal Transfer Doping Method for Fin-Like Field Effect Transistor [patent_app_type] => utility [patent_app_number] => 17/815857 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815857
Conformal transfer doping method for fin-like field effect transistor Jul 27, 2022 Issued
Array ( [id] => 17993165 [patent_doc_number] => 20220359202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/871659 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871659 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871659
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE Jul 21, 2022 Pending
Array ( [id] => 18857235 [patent_doc_number] => 11854828 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor device having metal gate and poly gate [patent_app_type] => utility [patent_app_number] => 17/850643 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850643 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850643
Semiconductor device having metal gate and poly gate Jun 26, 2022 Issued
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