Search

Mark T. Kopec

Examiner (ID: 6199, Phone: (571)272-1319 , Office: P/1761 )

Most Active Art Unit
1751
Art Unit(s)
1761, 1754, 1105, 1751, 1762, 1796
Total Applications
2601
Issued Applications
2061
Pending Applications
164
Abandoned Applications
410

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8941801 [patent_doc_number] => 20130191598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'DEVICE, SYSTEM AND METHOD OF ACCESSING DATA STORED IN A MEMORY' [patent_app_type] => utility [patent_app_number] => 13/795357 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6191 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795357 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/795357
DEVICE, SYSTEM AND METHOD OF ACCESSING DATA STORED IN A MEMORY Mar 11, 2013 Abandoned
Array ( [id] => 8965492 [patent_doc_number] => 20130205094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'EFFICIENT TRACK DESTAGE IN SECONDARY STORAGE' [patent_app_type] => utility [patent_app_number] => 13/795751 [patent_app_country] => US [patent_app_date] => 2013-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10536 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13795751 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/795751
Efficient track destage in secondary storage Mar 11, 2013 Issued
Array ( [id] => 8918019 [patent_doc_number] => 20130179644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'PARALLEL PROCESSING PROCESSOR SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/784738 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5813 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13784738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/784738
PARALLEL PROCESSING PROCESSOR SYSTEM Mar 3, 2013 Abandoned
Array ( [id] => 8918006 [patent_doc_number] => 20130179630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/782006 [patent_app_country] => US [patent_app_date] => 2013-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 21600 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13782006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/782006
Memory system Feb 28, 2013 Issued
Array ( [id] => 9049201 [patent_doc_number] => 08543759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Method for scheduling memory refresh operations including power states' [patent_app_type] => utility [patent_app_number] => 13/779343 [patent_app_country] => US [patent_app_date] => 2013-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3395 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13779343 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/779343
Method for scheduling memory refresh operations including power states Feb 26, 2013 Issued
Array ( [id] => 10046424 [patent_doc_number] => 09086821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Method and system for execution of applications in conjunction with raid' [patent_app_type] => utility [patent_app_number] => 13/750417 [patent_app_country] => US [patent_app_date] => 2013-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5630 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750417 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/750417
Method and system for execution of applications in conjunction with raid Jan 24, 2013 Issued
Array ( [id] => 9604809 [patent_doc_number] => 20140201491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'EFFICIENT ALLOCATION AND RECLAMATION OF THIN-PROVISIONED STORAGE' [patent_app_type] => utility [patent_app_number] => 13/741854 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6094 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741854 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741854
Efficient allocation and reclamation of thin-provisioned storage Jan 14, 2013 Issued
Array ( [id] => 9878924 [patent_doc_number] => 08966220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Optimizing large page processing' [patent_app_type] => utility [patent_app_number] => 13/741596 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4644 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741596 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741596
Optimizing large page processing Jan 14, 2013 Issued
Array ( [id] => 10177898 [patent_doc_number] => 09208102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Overlap checking for a translation lookaside buffer (TLB)' [patent_app_type] => utility [patent_app_number] => 13/741981 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8182 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741981 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741981
Overlap checking for a translation lookaside buffer (TLB) Jan 14, 2013 Issued
Array ( [id] => 9604794 [patent_doc_number] => 20140201476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'EVENT-BASED EXECUTION BUFFER MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 13/742156 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9687 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13742156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/742156
Event-based execution buffer management Jan 14, 2013 Issued
Array ( [id] => 10040979 [patent_doc_number] => 09081685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Data processing apparatus and method for handling performance of a cache maintenance operation' [patent_app_type] => utility [patent_app_number] => 13/741658 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8498 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741658
Data processing apparatus and method for handling performance of a cache maintenance operation Jan 14, 2013 Issued
Array ( [id] => 9604760 [patent_doc_number] => 20140201442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'CACHE BASED STORAGE CONTROLLER' [patent_app_type] => utility [patent_app_number] => 13/741465 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741465 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741465
CACHE BASED STORAGE CONTROLLER Jan 14, 2013 Abandoned
Array ( [id] => 9847601 [patent_doc_number] => 08949534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-03 [patent_title] => 'Multi-CPU system and computing system having the same' [patent_app_type] => utility [patent_app_number] => 13/741717 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7739 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741717
Multi-CPU system and computing system having the same Jan 14, 2013 Issued
Array ( [id] => 10651216 [patent_doc_number] => 09367468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-14 [patent_title] => 'Data cache way prediction' [patent_app_type] => utility [patent_app_number] => 13/741917 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13587 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741917 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741917
Data cache way prediction Jan 14, 2013 Issued
Array ( [id] => 9604814 [patent_doc_number] => 20140201496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'RESERVING FIXED AREAS IN REAL STORAGE INCREMENTS' [patent_app_type] => utility [patent_app_number] => 13/741595 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7448 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741595
Reserving fixed page areas in real storage increments Jan 14, 2013 Issued
Array ( [id] => 9604741 [patent_doc_number] => 20140201423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'SYSTEMS AND METHODS OF CONFIGURING A MODE OF OPERATION IN A SOLID-STATE MEMORY' [patent_app_type] => utility [patent_app_number] => 13/741299 [patent_app_country] => US [patent_app_date] => 2013-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7251 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13741299 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/741299
Systems and methods of configuring a mode of operation in a solid-state memory Jan 13, 2013 Issued
Array ( [id] => 9563751 [patent_doc_number] => 20140181464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'COALESCING ADJACENT GATHER/SCATTER OPERATIONS' [patent_app_type] => utility [patent_app_number] => 13/997784 [patent_app_country] => US [patent_app_date] => 2012-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 24164 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997784 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997784
Coalescing adjacent gather/scatter operations Dec 25, 2012 Issued
Array ( [id] => 10065744 [patent_doc_number] => 09104593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Filtering requests for a translation lookaside buffer' [patent_app_type] => utility [patent_app_number] => 13/714466 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6520 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714466 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714466
Filtering requests for a translation lookaside buffer Dec 13, 2012 Issued
Array ( [id] => 9083191 [patent_doc_number] => 20130268721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'NON-VOLATILE MEMORY DEVICE HAVING PARALLEL QUEUES WITH RESPECT TO CONCURRENTLY ADDRESSABLE UNITS, SYSTEM INCLUDING THE SAME, AND METHOD OF OPERATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/713377 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713377 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/713377
Non-volatile memory device having parallel queues with respect to concurrently addressable units, system including the same, and method of operating the same Dec 12, 2012 Issued
Array ( [id] => 10556281 [patent_doc_number] => 09280482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Methods and systems for provisioning a bootable image on to an external drive' [patent_app_type] => utility [patent_app_number] => 13/714385 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2989 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714385 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/714385
Methods and systems for provisioning a bootable image on to an external drive Dec 12, 2012 Issued
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