Search

Mark T Le

Examiner (ID: 16956, Phone: (571)272-6682 , Office: P/3617 )

Most Active Art Unit
3617
Art Unit(s)
3617, 3613, 3103, 3102, 3104
Total Applications
3361
Issued Applications
2650
Pending Applications
119
Abandoned Applications
591

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14011701 [patent_doc_number] => 10224326 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Fin cut during replacement gate formation [patent_app_type] => utility [patent_app_number] => 15/608545 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 29 [patent_no_of_words] => 9214 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15608545 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/608545
Fin cut during replacement gate formation May 29, 2017 Issued
Array ( [id] => 14367293 [patent_doc_number] => 10304961 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/604934 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 86 [patent_no_of_words] => 31423 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15604934 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/604934
Semiconductor device May 24, 2017 Issued
Array ( [id] => 11959455 [patent_doc_number] => 20170263606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/605318 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 12563 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605318 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605318
Semiconductor device and manufacturing method of semiconductor device May 24, 2017 Issued
Array ( [id] => 11946073 [patent_doc_number] => 20170250225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/595307 [patent_app_country] => US [patent_app_date] => 2017-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12210 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15595307 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/595307
Variable resistance memory devices and methods of manufacturing the same May 14, 2017 Issued
Array ( [id] => 11869724 [patent_doc_number] => 20170237009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'METHOD OF FABRICATING DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/586784 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 13346 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15586784 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/586784
Method of fabricating display device May 3, 2017 Issued
Array ( [id] => 15611645 [patent_doc_number] => 10586894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-10 [patent_title] => Light emitting unit and display device [patent_app_type] => utility [patent_app_number] => 15/488975 [patent_app_country] => US [patent_app_date] => 2017-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4570 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15488975 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/488975
Light emitting unit and display device Apr 16, 2017 Issued
Array ( [id] => 13201807 [patent_doc_number] => 10115824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Forming a contact for a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/474147 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 5508 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474147 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/474147
Forming a contact for a semiconductor device Mar 29, 2017 Issued
Array ( [id] => 12668656 [patent_doc_number] => 20180114718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => BARRIER PLANARIZATION FOR INTERCONNECT METALLIZATION [patent_app_type] => utility [patent_app_number] => 15/463877 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4897 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15463877 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/463877
BARRIER PLANARIZATION FOR INTERCONNECT METALLIZATION Mar 19, 2017 Abandoned
Array ( [id] => 11746667 [patent_doc_number] => 20170200740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-13 [patent_title] => 'FIELD RELAXATION THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND DISPLAY APPARATUS INCLUDING THE TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/460161 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5477 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460161 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/460161
FIELD RELAXATION THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME AND DISPLAY APPARATUS INCLUDING THE TRANSISTOR Mar 14, 2017 Abandoned
Array ( [id] => 11760453 [patent_doc_number] => 20170207322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'METHOD FOR MANUFACTURING A HIGH-VOLTAGE FINFET DEVICE HAVING LDMOS STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/452734 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5177 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452734 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/452734
Method for manufacturing a high-voltage FinFET device having LDMOS structure Mar 7, 2017 Issued
Array ( [id] => 12692905 [patent_doc_number] => 20180122801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => FIN CUT DURING REPLACEMENT GATE FORMATION [patent_app_type] => utility [patent_app_number] => 15/445107 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15445107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/445107
Fin cut during replacement gate formation Feb 27, 2017 Issued
Array ( [id] => 13963333 [patent_doc_number] => 20190058011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-21 [patent_title] => PHOTOSENSITIVE LAMINATE, METHOD OF MANUFACTURE AND IMAGE SENSOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/077323 [patent_app_country] => US [patent_app_date] => 2017-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16077323 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/077323
PHOTOSENSITIVE LAMINATE, METHOD OF MANUFACTURE AND IMAGE SENSOR DEVICES Feb 7, 2017 Abandoned
Array ( [id] => 13951097 [patent_doc_number] => 10211330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Vertical high voltage semiconductor apparatus and fabrication method of vertical high voltage semiconductor apparatus [patent_app_type] => utility [patent_app_number] => 15/423739 [patent_app_country] => US [patent_app_date] => 2017-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 7324 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15423739 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/423739
Vertical high voltage semiconductor apparatus and fabrication method of vertical high voltage semiconductor apparatus Feb 2, 2017 Issued
Array ( [id] => 11623117 [patent_doc_number] => 20170133305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => '3D SYSTEM-LEVEL PACKAGING METHODS AND STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/411889 [patent_app_country] => US [patent_app_date] => 2017-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4866 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15411889 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/411889
3D system-level packaging methods and structures Jan 19, 2017 Issued
Array ( [id] => 13808519 [patent_doc_number] => 10181528 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-15 [patent_title] => Thin-film transistor and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/396822 [patent_app_country] => US [patent_app_date] => 2017-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 6455 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396822 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/396822
Thin-film transistor and manufacturing method thereof Jan 2, 2017 Issued
Array ( [id] => 11571949 [patent_doc_number] => 20170110592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/392949 [patent_app_country] => US [patent_app_date] => 2016-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7135 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15392949 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/392949
Array substrate and method of fabricating the same Dec 27, 2016 Issued
Array ( [id] => 12127792 [patent_doc_number] => 20180011378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'LIQUID CRYSTAL DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/370227 [patent_app_country] => US [patent_app_date] => 2016-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370227 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/370227
Liquid crystal display device Dec 5, 2016 Issued
Array ( [id] => 15015725 [patent_doc_number] => 10454026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Controlling dopant concentration in correlated electron materials [patent_app_type] => utility [patent_app_number] => 15/370168 [patent_app_country] => US [patent_app_date] => 2016-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 11843 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370168 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/370168
Controlling dopant concentration in correlated electron materials Dec 5, 2016 Issued
Array ( [id] => 13201799 [patent_doc_number] => 10115820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-30 [patent_title] => Vertical transistors with sidewall gate air gaps and methods therefor [patent_app_type] => utility [patent_app_number] => 15/370193 [patent_app_country] => US [patent_app_date] => 2016-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 50 [patent_no_of_words] => 12290 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370193 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/370193
Vertical transistors with sidewall gate air gaps and methods therefor Dec 5, 2016 Issued
Array ( [id] => 12027115 [patent_doc_number] => 20170317214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/370182 [patent_app_country] => US [patent_app_date] => 2016-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 10162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15370182 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/370182
SEMICONDUCTOR DEVICE Dec 5, 2016 Abandoned
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