Search

Mark V Prenty

Examiner (ID: 5190, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2822, 2899, 2503
Total Applications
3007
Issued Applications
2570
Pending Applications
74
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20066063 [patent_doc_number] => 20250204285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => METHOD FOR MANUFACTURING AN OXRAM-TYPE RESISTIVE MEMORY CELL AND ASSOCIATED OXRAM-TYPE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/985575 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 996 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985575 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985575
Method for manufacturing an OxRAM-type resistive memory cell and associated OxRAM-type memory cell Dec 17, 2024 Issued
Array ( [id] => 20268597 [patent_doc_number] => 12439609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Process technique for embedded memory [patent_app_type] => utility [patent_app_number] => 18/910873 [patent_app_country] => US [patent_app_date] => 2024-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 0 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18910873 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/910873
Process technique for embedded memory Oct 8, 2024 Issued
Array ( [id] => 19722015 [patent_doc_number] => 12207574 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-21 [patent_title] => Reconfigurable heterojunction memristor, control method, fabrication method and application thereof [patent_app_type] => utility [patent_app_number] => 18/748017 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3684 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/748017
Reconfigurable heterojunction memristor, control method, fabrication method and application thereof Jun 18, 2024 Issued
Array ( [id] => 20268821 [patent_doc_number] => 12439838 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Resistive random access memory structure [patent_app_type] => utility [patent_app_number] => 18/741808 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741808 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741808
Resistive random access memory structure Jun 12, 2024 Issued
Array ( [id] => 19409254 [patent_doc_number] => 20240292765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => RESISTIVE RANDOM-ACCESS MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/658937 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658937 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/658937
RESISTIVE RANDOM-ACCESS MEMORY DEVICE May 7, 2024 Pending
Array ( [id] => 20244241 [patent_doc_number] => 12424573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Passivation scheme for pad openings and trenches [patent_app_type] => utility [patent_app_number] => 18/652868 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 6696 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652868 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652868
Passivation scheme for pad openings and trenches May 1, 2024 Issued
Array ( [id] => 19351525 [patent_doc_number] => 20240260489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => METHOD FOR FORMING A SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/635027 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4951 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635027 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635027
Method for forming a semiconductor memory device Apr 14, 2024 Issued
Array ( [id] => 19364425 [patent_doc_number] => 20240266459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => LOW NOISE GEIGER-MODE AVALANCHE PHOTODIODE AND MANUFACTURING PROCESS [patent_app_type] => utility [patent_app_number] => 18/608301 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608301 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608301
Low noise Geiger-mode avalanche photodiode and manufacturing process Mar 17, 2024 Issued
Array ( [id] => 19237589 [patent_doc_number] => 20240194784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SOURCE/DRAIN EPITAXIAL LAYER PROFILE [patent_app_type] => utility [patent_app_number] => 18/584282 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8531 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584282
SOURCE/DRAIN EPITAXIAL LAYER PROFILE Feb 21, 2024 Pending
Array ( [id] => 19057057 [patent_doc_number] => 20240099026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/519964 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8451 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18519964 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/519964
Semiconductor devices and hybrid transistors Nov 26, 2023 Issued
Array ( [id] => 19010193 [patent_doc_number] => 20240074264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/503242 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8109 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/503242
Display device Nov 6, 2023 Issued
Array ( [id] => 19010267 [patent_doc_number] => 20240074338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHOD FOR FORMING RESISTIVE RANDOM ACCESS MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/503140 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/503140
Method for forming resistive random access memory structure Nov 5, 2023 Issued
Array ( [id] => 19598609 [patent_doc_number] => 12156487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Method for forming resistive random-access memory device [patent_app_type] => utility [patent_app_number] => 18/382055 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3065 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382055 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382055
Method for forming resistive random-access memory device Oct 18, 2023 Issued
Array ( [id] => 19672808 [patent_doc_number] => 12185605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 18/380756 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3523 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380756
Display device Oct 16, 2023 Issued
Array ( [id] => 20205645 [patent_doc_number] => 12408442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Semiconductor device layout [patent_app_type] => utility [patent_app_number] => 18/483766 [patent_app_country] => US [patent_app_date] => 2023-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8085 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483766 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483766
Semiconductor device layout Oct 9, 2023 Issued
Array ( [id] => 19525661 [patent_doc_number] => 12127419 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Light-emitting element, light-emitting device, display device, electronic device, and lighting device [patent_app_type] => utility [patent_app_number] => 18/372234 [patent_app_country] => US [patent_app_date] => 2023-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 68 [patent_no_of_words] => 27623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18372234 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/372234
Light-emitting element, light-emitting device, display device, electronic device, and lighting device Sep 24, 2023 Issued
Array ( [id] => 19760094 [patent_doc_number] => 20250048659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/367468 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367468 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367468
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Sep 12, 2023 Pending
Array ( [id] => 18851286 [patent_doc_number] => 20230413690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 18/242550 [patent_app_country] => US [patent_app_date] => 2023-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3215 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18242550 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/242550
Semiconductor structure Sep 5, 2023 Issued
Array ( [id] => 19823656 [patent_doc_number] => 20250081863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => STRUCTURE TO REGULATE MULTI-FILAMENT FORMATION ON MEMORY STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/238736 [patent_app_country] => US [patent_app_date] => 2023-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4525 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18238736 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/238736
STRUCTURE TO REGULATE MULTI-FILAMENT FORMATION ON MEMORY STRUCTURE Aug 27, 2023 Pending
Array ( [id] => 18823172 [patent_doc_number] => 20230397513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD FOR MANUFACTURING RESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 18/452853 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452853 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/452853
Method for manufacturing resistive random access memory Aug 20, 2023 Issued
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