| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_title] => 'Compact semiconductor device having excellent electrical characteristics and long time reliability'
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Array
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[patent_issue_date] => 1996-05-21
[patent_title] => 'Reliability of metal leads in high speed LSI semiconductors using both dummy leads and thermoconductive layers'
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[patent_app_number] => 8/486305
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Array
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[patent_doc_number] => 05608256
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[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'Recessed sidewall-sealed and sandwiched poly-buffered LOCOS isolation regions, VLSI structures and methods'
[patent_app_type] => 1
[patent_app_number] => 8/478627
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Array
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[id] => 3565641
[patent_doc_number] => 05525833
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-11
[patent_title] => 'Process for making a bipolar junction transistor with a self-aligned base contact'
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[patent_app_number] => 8/476313
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Array
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Array
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Array
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[patent_app_number] => 8/488398
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[firstpage_image] =>[orig_patent_app_number] => 488398
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/488398 | Inverted field-effect device with polycrystalline silicon/germanium channel | Jun 6, 1995 | Issued |
Array
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[id] => 4037936
[patent_doc_number] => 05994739
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Integrated circuit device'
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[firstpage_image] =>[orig_patent_app_number] => 478654
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/478654 | Integrated circuit device | Jun 6, 1995 | Issued |
Array
(
[id] => 3733068
[patent_doc_number] => 05670816
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
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[firstpage_image] =>[orig_patent_app_number] => 487163
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/487163 | Semiconductor device | Jun 6, 1995 | Issued |
| 08/474855 | APPARATUS AND METHOD OF FABRICATING A MULTIPLE SUBSTRATE BIAS DYNAMIC RANDOM ACCESS MEMORY DEVICE | Jun 6, 1995 | Abandoned |
Array
(
[id] => 3654091
[patent_doc_number] => 05606178
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[patent_kind] => NA
[patent_issue_date] => 1997-02-25
[patent_title] => 'Bipolar resonant tunneling transistor'
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[patent_app_number] => 8/477683
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[firstpage_image] =>[orig_patent_app_number] => 477683
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/477683 | Bipolar resonant tunneling transistor | Jun 6, 1995 | Issued |
| 08/474275 | SEMICONDUCTOR DEVICE AND METHOD OF CONSTRUCTION | Jun 6, 1995 | Abandoned |
| 08/475245 | USING A CHANGE IN DOPING OF POLY GATE TO PERMIT PLACING BOTH HIGH VOLTAGE AND LOW VOLTAGE TRANSISTORS ON THE SAME CHIP | Jun 6, 1995 | Abandoned |
Array
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[id] => 3733155
[patent_doc_number] => 05670822
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[patent_issue_date] => 1997-09-23
[patent_title] => 'CMOS process compatible self-alignment lateral bipolar junction transistor'
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[firstpage_image] =>[orig_patent_app_number] => 476311
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Array
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Array
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Array
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