Search

Mark V Prenty

Examiner (ID: 5190, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2822, 2899, 2503
Total Applications
3007
Issued Applications
2570
Pending Applications
74
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
07/779079 SEMICONDUCTOR MEMORY DEVICE Oct 17, 1991 Abandoned
07/777597 FET HAVING GATE INSULATING FILMS WHOSE THICKNESS IS DIFFERENT DEPENDING ON PORTIONS Oct 15, 1991 Abandoned
Array ( [id] => 2860842 [patent_doc_number] => 05126816 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Integrated circuit with anti latch-up circuit in complementary MOS circuit technology' [patent_app_type] => 1 [patent_app_number] => 7/774733 [patent_app_country] => US [patent_app_date] => 1991-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4984 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/126/05126816.pdf [firstpage_image] =>[orig_patent_app_number] => 774733 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/774733
Integrated circuit with anti latch-up circuit in complementary MOS circuit technology Oct 9, 1991 Issued
Array ( [id] => 2783602 [patent_doc_number] => 05151775 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Integrated circuit device having improved substrate capacitance isolation' [patent_app_type] => 1 [patent_app_number] => 7/772753 [patent_app_country] => US [patent_app_date] => 1991-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2363 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151775.pdf [firstpage_image] =>[orig_patent_app_number] => 772753 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/772753
Integrated circuit device having improved substrate capacitance isolation Oct 6, 1991 Issued
Array ( [id] => 2989412 [patent_doc_number] => 05250832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'MOS type semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/770873 [patent_app_country] => US [patent_app_date] => 1991-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3693 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/250/05250832.pdf [firstpage_image] =>[orig_patent_app_number] => 770873 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/770873
MOS type semiconductor memory device Oct 3, 1991 Issued
Array ( [id] => 3019868 [patent_doc_number] => 05341028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Semiconductor device and a method of manufacturing thereof' [patent_app_type] => 1 [patent_app_number] => 7/770041 [patent_app_country] => US [patent_app_date] => 1991-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 4609 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/341/05341028.pdf [firstpage_image] =>[orig_patent_app_number] => 770041 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/770041
Semiconductor device and a method of manufacturing thereof Oct 2, 1991 Issued
Array ( [id] => 2981591 [patent_doc_number] => 05182627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Interconnect and resistor for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/769171 [patent_app_country] => US [patent_app_date] => 1991-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1945 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182627.pdf [firstpage_image] =>[orig_patent_app_number] => 769171 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/769171
Interconnect and resistor for integrated circuits Sep 29, 1991 Issued
07/767327 SEMICONDUCTOR DEVICE HAVING CAPACITOR AND MANUFACTURING METHOD THEREFOR Sep 29, 1991 Abandoned
07/767737 DEPLETION CONTROLLED ISOLATION STAGE Sep 29, 1991 Abandoned
Array ( [id] => 2831440 [patent_doc_number] => 05170240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-08 [patent_title] => 'Input protection structure for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 7/769173 [patent_app_country] => US [patent_app_date] => 1991-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1666 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/170/05170240.pdf [firstpage_image] =>[orig_patent_app_number] => 769173 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/769173
Input protection structure for integrated circuits Sep 29, 1991 Issued
07/767463 SEMICONDUCTOR DEVICE ENABLING TEMPERATURE CONTROL IN THE CHIP THEREOF Sep 29, 1991 Abandoned
Array ( [id] => 2904983 [patent_doc_number] => 05218227 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-08 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => 1 [patent_app_number] => 7/764765 [patent_app_country] => US [patent_app_date] => 1991-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 4242 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/218/05218227.pdf [firstpage_image] =>[orig_patent_app_number] => 764765 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/764765
Semiconductor device and method of manufacturing same Sep 23, 1991 Issued
07/764749 SELF-ALIGNED 3-DIMENSIONAL PMOS DEVICES WITHOUT SELECTIVE EPI Sep 23, 1991 Abandoned
Array ( [id] => 2911605 [patent_doc_number] => 05216268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-01 [patent_title] => 'Full-featured EEPROM' [patent_app_type] => 1 [patent_app_number] => 7/764013 [patent_app_country] => US [patent_app_date] => 1991-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3734 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/216/05216268.pdf [firstpage_image] =>[orig_patent_app_number] => 764013 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/764013
Full-featured EEPROM Sep 22, 1991 Issued
Array ( [id] => 2936140 [patent_doc_number] => 05233218 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Semiconductor wafer and process for producing same' [patent_app_type] => 1 [patent_app_number] => 7/762115 [patent_app_country] => US [patent_app_date] => 1991-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 28 [patent_no_of_words] => 2707 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233218.pdf [firstpage_image] =>[orig_patent_app_number] => 762115 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/762115
Semiconductor wafer and process for producing same Sep 18, 1991 Issued
Array ( [id] => 2850843 [patent_doc_number] => 05138403 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-08-11 [patent_title] => 'High temperature Schottky barrier bypass diodes' [patent_app_type] => 1 [patent_app_number] => 7/754330 [patent_app_country] => US [patent_app_date] => 1991-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 2471 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/138/05138403.pdf [firstpage_image] =>[orig_patent_app_number] => 754330 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/754330
High temperature Schottky barrier bypass diodes Sep 3, 1991 Issued
Array ( [id] => 2937950 [patent_doc_number] => 05220191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-15 [patent_title] => 'Semiconductor device having a well electrically insulated from the substrate' [patent_app_type] => 1 [patent_app_number] => 7/753043 [patent_app_country] => US [patent_app_date] => 1991-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5891 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/220/05220191.pdf [firstpage_image] =>[orig_patent_app_number] => 753043 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/753043
Semiconductor device having a well electrically insulated from the substrate Aug 29, 1991 Issued
Array ( [id] => 3087212 [patent_doc_number] => 05280187 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-18 [patent_title] => 'Electrically programmable and erasable semiconductor memory and method of operating same' [patent_app_type] => 1 [patent_app_number] => 7/747551 [patent_app_country] => US [patent_app_date] => 1991-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1750 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/280/05280187.pdf [firstpage_image] =>[orig_patent_app_number] => 747551 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/747551
Electrically programmable and erasable semiconductor memory and method of operating same Aug 19, 1991 Issued
Array ( [id] => 2811800 [patent_doc_number] => 05146298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/747657 [patent_app_country] => US [patent_app_date] => 1991-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4255 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146298.pdf [firstpage_image] =>[orig_patent_app_number] => 747657 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/747657
Device which functions as a lateral double-diffused insulated gate field effect transistor or as a bipolar transistor Aug 15, 1991 Issued
Array ( [id] => 2935978 [patent_doc_number] => 05233210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-03 [patent_title] => 'Non-volatile memory and method for fabricating same' [patent_app_type] => 1 [patent_app_number] => 7/745481 [patent_app_country] => US [patent_app_date] => 1991-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3835 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/233/05233210.pdf [firstpage_image] =>[orig_patent_app_number] => 745481 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/745481
Non-volatile memory and method for fabricating same Aug 13, 1991 Issued
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