| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2885967
[patent_doc_number] => 05119173
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-02
[patent_title] => 'Method of making integrated circuit to package connections'
[patent_app_type] => 1
[patent_app_number] => 7/714813
[patent_app_country] => US
[patent_app_date] => 1991-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 1162
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/119/05119173.pdf
[firstpage_image] =>[orig_patent_app_number] => 714813
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/714813 | Method of making integrated circuit to package connections | Jun 12, 1991 | Issued |
Array
(
[id] => 2938082
[patent_doc_number] => 05220199
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wiring substrate'
[patent_app_type] => 1
[patent_app_number] => 7/714627
[patent_app_country] => US
[patent_app_date] => 1991-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 6350
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/220/05220199.pdf
[firstpage_image] =>[orig_patent_app_number] => 714627
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/714627 | Semiconductor integrated circuit device in which a semiconductor chip is mounted with solder bumps for mounting to a wiring substrate | Jun 12, 1991 | Issued |
Array
(
[id] => 2860673
[patent_doc_number] => 05126807
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-30
[patent_title] => 'Vertical MOS transistor and its production method'
[patent_app_type] => 1
[patent_app_number] => 7/713505
[patent_app_country] => US
[patent_app_date] => 1991-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 25
[patent_no_of_words] => 3672
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/126/05126807.pdf
[firstpage_image] =>[orig_patent_app_number] => 713505
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/713505 | Vertical MOS transistor and its production method | Jun 11, 1991 | Issued |
Array
(
[id] => 2902836
[patent_doc_number] => 05184198
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-02-02
[patent_title] => 'Special geometry Schottky diode'
[patent_app_type] => 1
[patent_app_number] => 7/714341
[patent_app_country] => US
[patent_app_date] => 1991-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 1921
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/184/05184198.pdf
[firstpage_image] =>[orig_patent_app_number] => 714341
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/714341 | Special geometry Schottky diode | Jun 11, 1991 | Issued |
Array
(
[id] => 2908296
[patent_doc_number] => 05248890
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-28
[patent_title] => 'Valance specific lanthanide doped optoelectronic metal fluoride semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/711312
[patent_app_country] => US
[patent_app_date] => 1991-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2366
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/248/05248890.pdf
[firstpage_image] =>[orig_patent_app_number] => 711312
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/711312 | Valance specific lanthanide doped optoelectronic metal fluoride semiconductor device | Jun 5, 1991 | Issued |
| 07/710341 | SEMICONDUCTOR DEVICE HAVING BIPOLAR TRANSISTOR AND MOS TRANSISTOR | Jun 4, 1991 | Abandoned |
Array
(
[id] => 2797379
[patent_doc_number] => 05136358
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-04
[patent_title] => 'Multi-layered wiring structure'
[patent_app_type] => 1
[patent_app_number] => 7/710791
[patent_app_country] => US
[patent_app_date] => 1991-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 6473
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[pdf_file] => patents/05/136/05136358.pdf
[firstpage_image] =>[orig_patent_app_number] => 710791
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/710791 | Multi-layered wiring structure | Jun 4, 1991 | Issued |
Array
(
[id] => 2859291
[patent_doc_number] => 05134455
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-28
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/708993
[patent_app_country] => US
[patent_app_date] => 1991-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1831
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/134/05134455.pdf
[firstpage_image] =>[orig_patent_app_number] => 708993
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/708993 | Semiconductor integrated circuit device | May 30, 1991 | Issued |
| 07/708217 | SEMICONDUCTOR DEVICE WITH BURIED ELECTRODE | May 30, 1991 | Abandoned |
Array
(
[id] => 2898848
[patent_doc_number] => 05272372
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-21
[patent_title] => 'High speed non-volatile programmable read only memory device fabricated by using selective doping technology'
[patent_app_type] => 1
[patent_app_number] => 7/704254
[patent_app_country] => US
[patent_app_date] => 1991-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 7360
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/272/05272372.pdf
[firstpage_image] =>[orig_patent_app_number] => 704254
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/704254 | High speed non-volatile programmable read only memory device fabricated by using selective doping technology | May 21, 1991 | Issued |
Array
(
[id] => 2877067
[patent_doc_number] => 05153703
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-06
[patent_title] => 'Semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/704838
[patent_app_country] => US
[patent_app_date] => 1991-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 5
[patent_no_of_words] => 1599
[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/153/05153703.pdf
[firstpage_image] =>[orig_patent_app_number] => 704838
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/704838 | Semiconductor device | May 19, 1991 | Issued |
Array
(
[id] => 2884951
[patent_doc_number] => 05159423
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-27
[patent_title] => 'Self-aligned, planar heterojunction bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 7/702211
[patent_app_country] => US
[patent_app_date] => 1991-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3132
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/159/05159423.pdf
[firstpage_image] =>[orig_patent_app_number] => 702211
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/702211 | Self-aligned, planar heterojunction bipolar transistor | May 16, 1991 | Issued |
Array
(
[id] => 2875172
[patent_doc_number] => 05097312
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-17
[patent_title] => 'Heterojunction bipolar transistor and integration of same with field effect device'
[patent_app_type] => 1
[patent_app_number] => 7/701570
[patent_app_country] => US
[patent_app_date] => 1991-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 3548
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/097/05097312.pdf
[firstpage_image] =>[orig_patent_app_number] => 701570
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/701570 | Heterojunction bipolar transistor and integration of same with field effect device | May 13, 1991 | Issued |
Array
(
[id] => 2859307
[patent_doc_number] => 05134456
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-07-28
[patent_title] => 'Voltage divider for high-speed high-precision signal converting unit'
[patent_app_type] => 1
[patent_app_number] => 7/699714
[patent_app_country] => US
[patent_app_date] => 1991-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/134/05134456.pdf
[firstpage_image] =>[orig_patent_app_number] => 699714
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/699714 | Voltage divider for high-speed high-precision signal converting unit | May 13, 1991 | Issued |
Array
(
[id] => 2848688
[patent_doc_number] => 05172209
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-15
[patent_title] => 'Integral Bi-CMOS logic circuit'
[patent_app_type] => 1
[patent_app_number] => 7/698543
[patent_app_country] => US
[patent_app_date] => 1991-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/172/05172209.pdf
[firstpage_image] =>[orig_patent_app_number] => 698543
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/698543 | Integral Bi-CMOS logic circuit | May 9, 1991 | Issued |
Array
(
[id] => 2828402
[patent_doc_number] => 05173757
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-22
[patent_title] => 'Charge detection circuit for use in charge transfer device'
[patent_app_type] => 1
[patent_app_number] => 7/697159
[patent_app_country] => US
[patent_app_date] => 1991-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3286
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/173/05173757.pdf
[firstpage_image] =>[orig_patent_app_number] => 697159
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/697159 | Charge detection circuit for use in charge transfer device | May 7, 1991 | Issued |
| 07/696095 | LASER-BROKEN FUSE | May 5, 1991 | Abandoned |
Array
(
[id] => 2821692
[patent_doc_number] => 05122859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-16
[patent_title] => 'Iterative self-aligned contact metallization process'
[patent_app_type] => 1
[patent_app_number] => 7/693884
[patent_app_country] => US
[patent_app_date] => 1991-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 16
[patent_no_of_words] => 2914
[patent_no_of_claims] => 3
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[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/122/05122859.pdf
[firstpage_image] =>[orig_patent_app_number] => 693884
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/693884 | Iterative self-aligned contact metallization process | Apr 30, 1991 | Issued |
Array
(
[id] => 3100169
[patent_doc_number] => 05293053
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-03-08
[patent_title] => 'Elevated CMOS'
[patent_app_type] => 1
[patent_app_number] => 7/655500
[patent_app_country] => US
[patent_app_date] => 1991-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 7196
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/293/05293053.pdf
[firstpage_image] =>[orig_patent_app_number] => 655500
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/655500 | Elevated CMOS | Apr 30, 1991 | Issued |
| 07/692859 | STACKED I-CELL CAPACITOR AND PROCESS TO FABRICATE SAME | Apr 28, 1991 | Abandoned |