Search

Mark V Prenty

Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2503, 2822, 2899
Total Applications
2970
Issued Applications
2517
Pending Applications
67
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13682369 [patent_doc_number] => 20160379921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => CIRCUIT BOARDS AND SEMICONDUCTOR PACKAGES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/089604 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089604 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089604
Circuit boards and semiconductor packages including the same Apr 3, 2016 Issued
Array ( [id] => 12931681 [patent_doc_number] => 09829756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-28 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 15/090206 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15090206 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/090206
Display device Apr 3, 2016 Issued
Array ( [id] => 12953713 [patent_doc_number] => 09837382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 15/089630 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 7157 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089630 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089630
Semiconductor package and manufacturing method thereof Apr 3, 2016 Issued
Array ( [id] => 12147594 [patent_doc_number] => 09881853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Semiconductor package having a source-down configured transistor die and a drain-down configured transistor die' [patent_app_type] => utility [patent_app_number] => 15/089668 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 5488 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089668 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089668
Semiconductor package having a source-down configured transistor die and a drain-down configured transistor die Apr 3, 2016 Issued
Array ( [id] => 11876388 [patent_doc_number] => 09748169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Treating copper interconnects' [patent_app_type] => utility [patent_app_number] => 15/090017 [patent_app_country] => US [patent_app_date] => 2016-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5126 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15090017 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/090017
Treating copper interconnects Apr 3, 2016 Issued
Array ( [id] => 13057195 [patent_doc_number] => 10049996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Surface finishes for high density interconnect architectures [patent_app_type] => utility [patent_app_number] => 15/088711 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 7258 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088711 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088711
Surface finishes for high density interconnect architectures Mar 31, 2016 Issued
Array ( [id] => 11983661 [patent_doc_number] => 20170287816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'LEADFRAME TOP-HAT MULTI-CHIP SOLUTION' [patent_app_type] => utility [patent_app_number] => 15/089244 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5917 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089244 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089244
LEADFRAME TOP-HAT MULTI-CHIP SOLUTION Mar 31, 2016 Abandoned
Array ( [id] => 11103827 [patent_doc_number] => 20160300797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'Double-Sided Semiconductor Package and Dual-Mold Method of Making Same' [patent_app_type] => utility [patent_app_number] => 15/089151 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8736 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089151 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089151
Double-sided semiconductor package and dual-mold method of making same Mar 31, 2016 Issued
Array ( [id] => 11983580 [patent_doc_number] => 20170287735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'ELECTRONIC DEVICE PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/089136 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9068 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089136 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/089136
Electronic device package Mar 31, 2016 Issued
Array ( [id] => 12012740 [patent_doc_number] => 09806061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'Bumpless wafer level fan-out package' [patent_app_type] => utility [patent_app_number] => 15/087907 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15087907 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/087907
Bumpless wafer level fan-out package Mar 30, 2016 Issued
Array ( [id] => 11085140 [patent_doc_number] => 20160282105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'Model-Based Single Parameter Measurement' [patent_app_type] => utility [patent_app_number] => 15/076530 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076530 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/076530
Model-based single parameter measurement Mar 20, 2016 Issued
Array ( [id] => 11293763 [patent_doc_number] => 20160343695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-24 [patent_title] => 'SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/071573 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5478 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071573 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/071573
Semiconductor package assembly with facing active surfaces of first and second semiconductor die and method for forming the same Mar 15, 2016 Issued
Array ( [id] => 11410076 [patent_doc_number] => 09557376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-31 [patent_title] => 'Apparatuses and methods for die seal crack detection' [patent_app_type] => utility [patent_app_number] => 15/069316 [patent_app_country] => US [patent_app_date] => 2016-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2675 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15069316 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/069316
Apparatuses and methods for die seal crack detection Mar 13, 2016 Issued
Array ( [id] => 13893955 [patent_doc_number] => 10199534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Light-emitting diode, light-emitting diode package, and lighting system including same [patent_app_type] => utility [patent_app_number] => 15/557019 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7628 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15557019 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/557019
Light-emitting diode, light-emitting diode package, and lighting system including same Mar 10, 2016 Issued
Array ( [id] => 12223542 [patent_doc_number] => 20180061902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'ORGANIC LIGHT-EMITTING ELEMENT AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/557037 [patent_app_country] => US [patent_app_date] => 2016-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 10298 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15557037 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/557037
Organic light-emitting element and organic light-emitting display device Mar 9, 2016 Issued
Array ( [id] => 12012853 [patent_doc_number] => 09806177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-31 [patent_title] => 'FinFETs and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 15/058657 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 4588 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058657 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058657
FinFETs and methods for forming the same Mar 1, 2016 Issued
Array ( [id] => 12040390 [patent_doc_number] => 09818625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-11-14 [patent_title] => 'Stacked semiconductor die assemblies with thermal spacers and associated systems and methods' [patent_app_type] => utility [patent_app_number] => 15/059076 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4121 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15059076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/059076
Stacked semiconductor die assemblies with thermal spacers and associated systems and methods Mar 1, 2016 Issued
Array ( [id] => 10984241 [patent_doc_number] => 20160181186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 15/058863 [patent_app_country] => US [patent_app_date] => 2016-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11717 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15058863 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/058863
Semiconductor device and production method therefor Mar 1, 2016 Issued
Array ( [id] => 13832601 [patent_doc_number] => 20190019785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => POWER SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 16/068934 [patent_app_country] => US [patent_app_date] => 2016-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6480 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16068934 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/068934
Power semiconductor module Feb 17, 2016 Issued
Array ( [id] => 11867272 [patent_doc_number] => 20170234557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'SYSTEMS AND METHODS FOR AIR TEMPERATURE CONTROL USING A TARGET TIME BASED CONTROL PLAN' [patent_app_type] => utility [patent_app_number] => 15/043134 [patent_app_country] => US [patent_app_date] => 2016-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8506 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15043134 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/043134
Systems and methods for air temperature control using a target time based control plan Feb 11, 2016 Issued
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