Search

Mark V. Prenty

Examiner (ID: 292, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2503, 2899, 2822
Total Applications
3014
Issued Applications
2582
Pending Applications
65
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19163245 [patent_doc_number] => 20240155952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => PROCESS-INDUCED FORMING OF OXIDE RRAM [patent_app_type] => utility [patent_app_number] => 18/052590 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052590
Process-induced forming of oxide RRAM Nov 3, 2022 Issued
Array ( [id] => 19342713 [patent_doc_number] => 12052921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Method for manufacturing a film on a flexible sheet [patent_app_type] => utility [patent_app_number] => 18/049529 [patent_app_country] => US [patent_app_date] => 2022-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 21 [patent_no_of_words] => 4707 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18049529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/049529
Method for manufacturing a film on a flexible sheet Oct 24, 2022 Issued
Array ( [id] => 19118505 [patent_doc_number] => 20240130255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => STRUCTURE AND METHOD FOR MEMORY ELEMENT TO CONFINE METAL WITH SPACER [patent_app_type] => utility [patent_app_number] => 18/046170 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5959 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046170
Structure and method for memory element to confine metal with spacer Oct 12, 2022 Issued
Array ( [id] => 19371691 [patent_doc_number] => 12063796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Manufacturing method of resistive random access memory device [patent_app_type] => utility [patent_app_number] => 17/960121 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5812 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17960121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/960121
Manufacturing method of resistive random access memory device Oct 3, 2022 Issued
Array ( [id] => 19101187 [patent_doc_number] => 20240120415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => TECHNOLOGIES FOR ATOMIC LAYER DEPOSITION FOR FERROELECTRIC TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/958362 [patent_app_country] => US [patent_app_date] => 2022-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958362 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958362
TECHNOLOGIES FOR ATOMIC LAYER DEPOSITION FOR FERROELECTRIC TRANSISTORS Sep 30, 2022 Pending
Array ( [id] => 19086308 [patent_doc_number] => 20240113109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => PLUG BETWEEN TWO GATES OF A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/958291 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958291 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958291
PLUG BETWEEN TWO GATES OF A SEMICONDUCTOR DEVICE Sep 29, 2022 Pending
Array ( [id] => 18347986 [patent_doc_number] => 20230136097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => ReRAM Device and Method for Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 17/953472 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953472 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953472
ReRAM Device and Method for Manufacturing the Same Sep 26, 2022 Pending
Array ( [id] => 19057194 [patent_doc_number] => 20240099163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Hydrogen and Hydrocarbon Plasma Treatment of Phase Change Memory Material [patent_app_type] => utility [patent_app_number] => 17/948990 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6020 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948990
Hydrogen and Hydrocarbon Plasma Treatment of Phase Change Memory Material Sep 19, 2022 Pending
Array ( [id] => 19569476 [patent_doc_number] => 12144269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Thermal field controlled electrical conductivity change device [patent_app_type] => utility [patent_app_number] => 17/948712 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4310 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17948712 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/948712
Thermal field controlled electrical conductivity change device Sep 19, 2022 Issued
Array ( [id] => 19054730 [patent_doc_number] => 20240096699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SELF-ALIGNED BACKSIDE CONTACT IN NANOSHEET WITHOUT BDI [patent_app_type] => utility [patent_app_number] => 17/945418 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945418 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945418
SELF-ALIGNED BACKSIDE CONTACT IN NANOSHEET WITHOUT BDI Sep 14, 2022 Pending
Array ( [id] => 19213702 [patent_doc_number] => 12002774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Passivation scheme for pad openings and trenches [patent_app_type] => utility [patent_app_number] => 17/940081 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 11444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940081 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940081
Passivation scheme for pad openings and trenches Sep 7, 2022 Issued
Array ( [id] => 20457664 [patent_doc_number] => 12520737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => RRAM structure and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/938926 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938926
RRAM structure and method of fabricating the same Sep 5, 2022 Issued
Array ( [id] => 19796429 [patent_doc_number] => 12237401 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Semiconductor chip [patent_app_type] => utility [patent_app_number] => 17/821195 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 3836 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821195
Semiconductor chip Aug 21, 2022 Issued
Array ( [id] => 19783280 [patent_doc_number] => 12232335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => RRAM process integration scheme and cell structure with reduced masking operations [patent_app_type] => utility [patent_app_number] => 17/890837 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3959 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890837 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890837
RRAM process integration scheme and cell structure with reduced masking operations Aug 17, 2022 Issued
Array ( [id] => 18149676 [patent_doc_number] => 20230023533 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => MEMRISTIVE DEVICE [patent_app_type] => utility [patent_app_number] => 17/889276 [patent_app_country] => US [patent_app_date] => 2022-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889276
Memristive device Aug 15, 2022 Issued
Array ( [id] => 20163155 [patent_doc_number] => 12389814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => High electron affinity dielectric layer to improve cycling [patent_app_type] => utility [patent_app_number] => 17/880835 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 36 [patent_no_of_words] => 8322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880835
High electron affinity dielectric layer to improve cycling Aug 3, 2022 Issued
Array ( [id] => 19973970 [patent_doc_number] => 12342604 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Fin isolation structures of semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/875009 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 5468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875009
Fin isolation structures of semiconductor devices Jul 26, 2022 Issued
Array ( [id] => 17993714 [patent_doc_number] => 20220359751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SOURCE/DRAIN EPITAXIAL LAYER PROFILE [patent_app_type] => utility [patent_app_number] => 17/815063 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8502 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815063 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815063
Source/drain epitaxial layer profile Jul 25, 2022 Issued
Array ( [id] => 17993719 [patent_doc_number] => 20220359756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => FinFETs and Methods of Forming FinFETs [patent_app_type] => utility [patent_app_number] => 17/814681 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814681
FinFETs and methods of forming FinFETs Jul 24, 2022 Issued
Array ( [id] => 17993786 [patent_doc_number] => 20220359823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => TOP ELECTRODE VIA WITH LOW CONTACT RESISTANCE [patent_app_type] => utility [patent_app_number] => 17/868968 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868968 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868968
Top electrode via with low contact resistance Jul 19, 2022 Issued
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