Search

Mark V Prenty

Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2503, 2822, 2899
Total Applications
2970
Issued Applications
2517
Pending Applications
67
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9220375 [patent_doc_number] => 20140015150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-16 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SAME' [patent_app_type] => utility [patent_app_number] => 13/933621 [patent_app_country] => US [patent_app_date] => 2013-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3047 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13933621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/933621
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SAME Jul 1, 2013 Abandoned
Array ( [id] => 9335135 [patent_doc_number] => 20140061917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/930187 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7683 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13930187 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/930187
Semiconductor device and fabricating method thereof Jun 27, 2013 Issued
Array ( [id] => 10066894 [patent_doc_number] => 09105754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Adhesive film, method of manufacturing semiconductor device, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/929612 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 9527 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929612 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929612
Adhesive film, method of manufacturing semiconductor device, and semiconductor device Jun 26, 2013 Issued
Array ( [id] => 9789776 [patent_doc_number] => 20150001720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'Interconnect Structure and Method for Forming Interconnect Structure' [patent_app_type] => utility [patent_app_number] => 13/929341 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3935 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13929341 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/929341
Interconnect Structure and Method for Forming Interconnect Structure Jun 26, 2013 Abandoned
Array ( [id] => 9406287 [patent_doc_number] => 20140097539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-10 [patent_title] => 'TECHNIQUE FOR UNIFORM CMP' [patent_app_type] => utility [patent_app_number] => 13/928084 [patent_app_country] => US [patent_app_date] => 2013-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13928084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/928084
TECHNIQUE FOR UNIFORM CMP Jun 25, 2013 Abandoned
Array ( [id] => 10857431 [patent_doc_number] => 08883628 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Electrical connection structure' [patent_app_type] => utility [patent_app_number] => 13/925924 [patent_app_country] => US [patent_app_date] => 2013-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2826 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13925924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/925924
Electrical connection structure Jun 24, 2013 Issued
Array ( [id] => 9259865 [patent_doc_number] => 20130341794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-26 [patent_title] => 'ULTRA-THIN COPPER SEED LAYER FOR ELECTROPLATING INTO SMALL FEATURES' [patent_app_type] => utility [patent_app_number] => 13/923979 [patent_app_country] => US [patent_app_date] => 2013-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13923979 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/923979
ULTRA-THIN COPPER SEED LAYER FOR ELECTROPLATING INTO SMALL FEATURES Jun 20, 2013 Abandoned
Array ( [id] => 10525574 [patent_doc_number] => 09252095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Semiconductor package and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/922722 [patent_app_country] => US [patent_app_date] => 2013-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 29 [patent_no_of_words] => 10194 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13922722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/922722
Semiconductor package and method of fabricating the same Jun 19, 2013 Issued
Array ( [id] => 9380991 [patent_doc_number] => 20140084472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'COMPOUND DIELECTRIC ANTI-COPPER-DIFFUSION BARRIER LAYER FOR COPPER CONNECTION AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/920637 [patent_app_country] => US [patent_app_date] => 2013-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2103 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13920637 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/920637
COMPOUND DIELECTRIC ANTI-COPPER-DIFFUSION BARRIER LAYER FOR COPPER CONNECTION AND MANUFACTURING METHOD THEREOF Jun 17, 2013 Abandoned
Array ( [id] => 9832419 [patent_doc_number] => 08941237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/920520 [patent_app_country] => US [patent_app_date] => 2013-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 12768 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13920520 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/920520
Semiconductor device Jun 17, 2013 Issued
Array ( [id] => 9145441 [patent_doc_number] => 20130299964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'METHOD FOR FORMING A FINE PATTERN USING ISOTROPIC ETCHING' [patent_app_type] => utility [patent_app_number] => 13/917207 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4830 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917207 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917207
Method for forming a fine pattern using isotropic etching Jun 12, 2013 Issued
Array ( [id] => 9818346 [patent_doc_number] => 08928134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Package on package bonding structure and method for forming the same' [patent_app_type] => utility [patent_app_number] => 13/916243 [patent_app_country] => US [patent_app_date] => 2013-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 4637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13916243 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/916243
Package on package bonding structure and method for forming the same Jun 11, 2013 Issued
Array ( [id] => 9876056 [patent_doc_number] => 08963329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/915278 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8263 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915278 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915278
Semiconductor device Jun 10, 2013 Issued
Array ( [id] => 9729165 [patent_doc_number] => 20140264872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Metal Capping Layer for Interconnect Applications' [patent_app_type] => utility [patent_app_number] => 13/915376 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4074 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915376 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915376
Metal Capping Layer for Interconnect Applications Jun 10, 2013 Abandoned
Array ( [id] => 9202480 [patent_doc_number] => 20140001657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'ENCAPSULATING LAYER-COVERED SEMICONDUCTOR ELEMENT, PRODUCING METHOD THEREOF, AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/914231 [patent_app_country] => US [patent_app_date] => 2013-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 17668 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914231 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/914231
Encapsulating layer-covered semiconductor element, producing method thereof, and semiconductor device Jun 9, 2013 Issued
Array ( [id] => 9188902 [patent_doc_number] => 20130328217 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'METHOD OF MARKING SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/910304 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 14585 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13910304 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/910304
METHOD OF MARKING SEMICONDUCTOR ELEMENT, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE Jun 4, 2013 Abandoned
Array ( [id] => 10883113 [patent_doc_number] => 08907496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-09 [patent_title] => 'Circuit structures and methods of fabrication with enhanced contact via electrical connection' [patent_app_type] => utility [patent_app_number] => 13/909301 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909301 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909301
Circuit structures and methods of fabrication with enhanced contact via electrical connection Jun 3, 2013 Issued
Array ( [id] => 10028781 [patent_doc_number] => 09070690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-30 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/909551 [patent_app_country] => US [patent_app_date] => 2013-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 47 [patent_no_of_words] => 23793 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13909551 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/909551
Semiconductor device and method of manufacturing the same Jun 3, 2013 Issued
Array ( [id] => 10950820 [patent_doc_number] => 20140353841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-04 [patent_title] => 'METHOD FOR FORMING AN ELECTRICAL CONNECTION BETWEEN METAL LAYERS' [patent_app_type] => utility [patent_app_number] => 13/907119 [patent_app_country] => US [patent_app_date] => 2013-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13907119 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/907119
Method for forming an electrical connection between metal layers May 30, 2013 Issued
Array ( [id] => 10888656 [patent_doc_number] => 08912652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/906441 [patent_app_country] => US [patent_app_date] => 2013-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906441 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/906441
Semiconductor device and method for manufacturing the same May 30, 2013 Issued
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