Mark V Prenty
Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )
Most Active Art Unit | 2822 |
Art Unit(s) | 2814, 2503, 2822, 2899 |
Total Applications | 2970 |
Issued Applications | 2517 |
Pending Applications | 67 |
Abandoned Applications | 386 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7666890
[patent_doc_number] => 20110316159
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-29
[patent_title] => 'CHIP STACK PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 13/224670
[patent_app_country] => US
[patent_app_date] => 2011-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
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[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13224670
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/224670 | Chip stack package | Sep 1, 2011 | Issued |
Array
(
[id] => 7577335
[patent_doc_number] => 20110291217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-01
[patent_title] => 'PHOTOELECTRIC CONVERTER AND IMAGING SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/207272
[patent_app_country] => US
[patent_app_date] => 2011-08-10
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[pdf_file] => publications/A1/0291/20110291217.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/207272 | PHOTOELECTRIC CONVERTER AND IMAGING SYSTEM INCLUDING THE SAME | Aug 9, 2011 | Abandoned |
Array
(
[id] => 9000414
[patent_doc_number] => 20130221539
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT WITH A THROUGH-CONTACT AND SEMICONDUCTOR COMPONENT WITH THROUGH-CONTACT'
[patent_app_type] => utility
[patent_app_number] => 13/820998
[patent_app_country] => US
[patent_app_date] => 2011-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/820998 | Method for producing a semiconductor component with a through-contact and semiconductor component with through-contact | Aug 8, 2011 | Issued |
Array
(
[id] => 9234230
[patent_doc_number] => 08599539
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-03
[patent_title] => 'Ceramic chip assembly'
[patent_app_type] => utility
[patent_app_number] => 13/193836
[patent_app_country] => US
[patent_app_date] => 2011-07-29
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/193836 | Ceramic chip assembly | Jul 28, 2011 | Issued |
Array
(
[id] => 8634855
[patent_doc_number] => 20130026658
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'WAFER LEVEL CHIP SCALE PACKAGE FOR WIRE-BONDING CONNECTION'
[patent_app_type] => utility
[patent_app_number] => 13/193911
[patent_app_country] => US
[patent_app_date] => 2011-07-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/193911 | WAFER LEVEL CHIP SCALE PACKAGE FOR WIRE-BONDING CONNECTION | Jul 28, 2011 | Abandoned |
Array
(
[id] => 9677592
[patent_doc_number] => 08816505
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Low stress vias'
[patent_app_type] => utility
[patent_app_number] => 13/193814
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/193814 | Low stress vias | Jul 28, 2011 | Issued |
Array
(
[id] => 7815206
[patent_doc_number] => 20120061826
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-15
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/192065
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[pdf_file] => publications/A1/0061/20120061826.pdf
[firstpage_image] =>[orig_patent_app_number] => 13192065
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/192065 | Semiconductor device | Jul 26, 2011 | Issued |
Array
(
[id] => 8634827
[patent_doc_number] => 20130026630
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'FLIP CHIPS HAVING MULTIPLE SOLDER BUMP GEOMETRIES'
[patent_app_type] => utility
[patent_app_number] => 13/191632
[patent_app_country] => US
[patent_app_date] => 2011-07-27
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13191632
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/191632 | FLIP CHIPS HAVING MULTIPLE SOLDER BUMP GEOMETRIES | Jul 26, 2011 | Abandoned |
Array
(
[id] => 9676789
[patent_doc_number] => 08815698
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-26
[patent_title] => 'Well region formation method and semiconductor base'
[patent_app_type] => utility
[patent_app_number] => 13/381636
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/381636 | Well region formation method and semiconductor base | Jul 25, 2011 | Issued |
Array
(
[id] => 8634838
[patent_doc_number] => 20130026641
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[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'CONDUCTOR CONTACT STRUCTURE AND FORMING METHOD, AND PHOTOMASK PATTERN GENERATING METHOD FOR DEFINING SUCH CONDUCTOR CONTACT STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/189623
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Array
(
[id] => 8634834
[patent_doc_number] => 20130026637
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'METAL GATE ELECTRODE OF A FIELD EFFECT TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/189732
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/189732 | Metal gate electrode of a field effect transistor | Jul 24, 2011 | Issued |
Array
(
[id] => 8943970
[patent_doc_number] => 08497148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-30
[patent_title] => 'MEMS devices and methods of forming same'
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Array
(
[id] => 7787809
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[patent_title] => 'SEMICONDUCTOR PACKAGE'
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Array
(
[id] => 8615399
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[patent_kind] => A1
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[patent_title] => 'Interconnect Pillars with Directed Compliance Geometry'
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Array
(
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Array
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[patent_title] => 'Film for flip chip type semiconductor back surface, dicing tape-integrated film for semiconductor back surface, process for producing semiconductor device, and flip chip type semiconductor device'
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Array
(
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Array
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Array
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Array
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