Search

Mark V Prenty

Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2814, 2503, 2822, 2899
Total Applications
2970
Issued Applications
2517
Pending Applications
67
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5963422 [patent_doc_number] => 20110147895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'Apparatus and Method for Controlling Semiconductor Die Warpage' [patent_app_type] => utility [patent_app_number] => 12/640111 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2444 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20110147895.pdf [firstpage_image] =>[orig_patent_app_number] => 12640111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640111
Apparatus and method for controlling semiconductor die warpage Dec 16, 2009 Issued
Array ( [id] => 5948507 [patent_doc_number] => 20110031609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'SEMICONDUCTOR PACKAGE HAVING THROUGH ELECTRODES THAT REDUCE LEAKAGE CURRENT AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/640102 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3501 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031609.pdf [firstpage_image] =>[orig_patent_app_number] => 12640102 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640102
SEMICONDUCTOR PACKAGE HAVING THROUGH ELECTRODES THAT REDUCE LEAKAGE CURRENT AND METHOD FOR MANUFACTURING THE SAME Dec 16, 2009 Abandoned
Array ( [id] => 8808352 [patent_doc_number] => 08446006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Structures and methods to reduce maximum current density in a solder ball' [patent_app_type] => utility [patent_app_number] => 12/640752 [patent_app_country] => US [patent_app_date] => 2009-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 55 [patent_no_of_words] => 11152 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12640752 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/640752
Structures and methods to reduce maximum current density in a solder ball Dec 16, 2009 Issued
Array ( [id] => 6400877 [patent_doc_number] => 20100148332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/639421 [patent_app_country] => US [patent_app_date] => 2009-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5899 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20100148332.pdf [firstpage_image] =>[orig_patent_app_number] => 12639421 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/639421
Semiconductor apparatus and manufacturing method thereof Dec 15, 2009 Issued
Array ( [id] => 8115693 [patent_doc_number] => 08159065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Semiconductor package having an internal cooling system' [patent_app_type] => utility [patent_app_number] => 12/639222 [patent_app_country] => US [patent_app_date] => 2009-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 7048 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159065.pdf [firstpage_image] =>[orig_patent_app_number] => 12639222 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/639222
Semiconductor package having an internal cooling system Dec 15, 2009 Issued
Array ( [id] => 8115691 [patent_doc_number] => 08159066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Semiconductor package having a heat dissipation member' [patent_app_type] => utility [patent_app_number] => 12/639211 [patent_app_country] => US [patent_app_date] => 2009-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3376 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159066.pdf [firstpage_image] =>[orig_patent_app_number] => 12639211 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/639211
Semiconductor package having a heat dissipation member Dec 15, 2009 Issued
Array ( [id] => 7515874 [patent_doc_number] => 08039946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Chip package structure and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 12/630103 [patent_app_country] => US [patent_app_date] => 2009-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/039/08039946.pdf [firstpage_image] =>[orig_patent_app_number] => 12630103 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/630103
Chip package structure and fabricating method thereof Dec 2, 2009 Issued
Array ( [id] => 6358931 [patent_doc_number] => 20100078801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'CHIP PACKAGE STRUCTURE AND FABRICATING METHOD THREROF' [patent_app_type] => utility [patent_app_number] => 12/630099 [patent_app_country] => US [patent_app_date] => 2009-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3844 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20100078801.pdf [firstpage_image] =>[orig_patent_app_number] => 12630099 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/630099
CHIP PACKAGE STRUCTURE AND FABRICATING METHOD THREROF Dec 2, 2009 Abandoned
Array ( [id] => 9497180 [patent_doc_number] => 08736002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Sensor mounted in flip-chip technology at a substrate edge' [patent_app_type] => utility [patent_app_number] => 13/498490 [patent_app_country] => US [patent_app_date] => 2009-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2816 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13498490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/498490
Sensor mounted in flip-chip technology at a substrate edge Nov 17, 2009 Issued
Array ( [id] => 8462563 [patent_doc_number] => 20120267731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'SENSOR MOUNTED IN FLIP-CHIP TECHNOLOGY ON A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/498371 [patent_app_country] => US [patent_app_date] => 2009-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2867 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13498371 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/498371
Sensor mounted in flip-chip technology on a substrate Nov 17, 2009 Issued
Array ( [id] => 6295144 [patent_doc_number] => 20100065953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-18 [patent_title] => 'Semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/591396 [patent_app_country] => US [patent_app_date] => 2009-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11921 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20100065953.pdf [firstpage_image] =>[orig_patent_app_number] => 12591396 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/591396
Semiconductor package Nov 17, 2009 Issued
Array ( [id] => 9074901 [patent_doc_number] => 08552481 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Imaging device and imaging system' [patent_app_type] => utility [patent_app_number] => 12/619957 [patent_app_country] => US [patent_app_date] => 2009-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 5073 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12619957 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/619957
Imaging device and imaging system Nov 16, 2009 Issued
Array ( [id] => 6216091 [patent_doc_number] => 20100052145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/616453 [patent_app_country] => US [patent_app_date] => 2009-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052145.pdf [firstpage_image] =>[orig_patent_app_number] => 12616453 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/616453
Semiconductor package and method therefor Nov 10, 2009 Issued
Array ( [id] => 4624767 [patent_doc_number] => 08004068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Shielded multi-layer package structures' [patent_app_type] => utility [patent_app_number] => 12/606702 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2239 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004068.pdf [firstpage_image] =>[orig_patent_app_number] => 12606702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/606702
Shielded multi-layer package structures Oct 26, 2009 Issued
Array ( [id] => 5461647 [patent_doc_number] => 20090321847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'HIGH PERFORMANCE CMOS DEVICES COMPRISING GAPPED DUAL STRESSORS WITH DIELECTRIC GAP FILLERS, AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/556261 [patent_app_country] => US [patent_app_date] => 2009-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5897 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321847.pdf [firstpage_image] =>[orig_patent_app_number] => 12556261 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/556261
High performance CMOS devices comprising gapped dual stressors with dielectric gap fillers, and methods of fabricating the same Sep 8, 2009 Issued
Array ( [id] => 6336783 [patent_doc_number] => 20100019367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-28 [patent_title] => 'METHOD OF FORMING A MOLDED ARRAY PACKAGE DEVICE HAVING AN EXPOSED TAB AND STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/553706 [patent_app_country] => US [patent_app_date] => 2009-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4209 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0019/20100019367.pdf [firstpage_image] =>[orig_patent_app_number] => 12553706 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/553706
Method of forming a molded array package device having an exposed tab and structure Sep 2, 2009 Issued
Array ( [id] => 5300285 [patent_doc_number] => 20090294937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS' [patent_app_type] => utility [patent_app_number] => 12/541280 [patent_app_country] => US [patent_app_date] => 2009-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4274 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20090294937.pdf [firstpage_image] =>[orig_patent_app_number] => 12541280 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/541280
TWO-WAY HEAT EXTRACTION FROM PACKAGED SEMICONDUCTOR CHIPS Aug 13, 2009 Abandoned
Array ( [id] => 133775 [patent_doc_number] => 07696535 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Gallium nitride high electron mobility transistor having inner field-plate for high power applications' [patent_app_type] => utility [patent_app_number] => 12/495974 [patent_app_country] => US [patent_app_date] => 2009-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3021 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696535.pdf [firstpage_image] =>[orig_patent_app_number] => 12495974 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/495974
Gallium nitride high electron mobility transistor having inner field-plate for high power applications Jun 30, 2009 Issued
Array ( [id] => 5493439 [patent_doc_number] => 20090261467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/457816 [patent_app_country] => US [patent_app_date] => 2009-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2550 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20090261467.pdf [firstpage_image] =>[orig_patent_app_number] => 12457816 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/457816
Semiconductor device Jun 22, 2009 Abandoned
Array ( [id] => 4614338 [patent_doc_number] => 07989928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Semiconductor device packages with electromagnetic interference shielding' [patent_app_type] => utility [patent_app_number] => 12/489115 [patent_app_country] => US [patent_app_date] => 2009-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9416 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989928.pdf [firstpage_image] =>[orig_patent_app_number] => 12489115 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/489115
Semiconductor device packages with electromagnetic interference shielding Jun 21, 2009 Issued
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