Mark V Prenty
Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )
Most Active Art Unit | 2822 |
Art Unit(s) | 2814, 2503, 2822, 2899 |
Total Applications | 2970 |
Issued Applications | 2517 |
Pending Applications | 67 |
Abandoned Applications | 386 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 7801550
[patent_doc_number] => 08129824
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-03-06
[patent_title] => 'Shielding for a semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 12/327716
[patent_app_country] => US
[patent_app_date] => 2008-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 13993
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/129/08129824.pdf
[firstpage_image] =>[orig_patent_app_number] => 12327716
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/327716 | Shielding for a semiconductor package | Dec 2, 2008 | Issued |
Array
(
[id] => 4597171
[patent_doc_number] => 07982298
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-07-19
[patent_title] => 'Package in package semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/327763
[patent_app_country] => US
[patent_app_date] => 2008-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 19
[patent_no_of_words] => 7926
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/982/07982298.pdf
[firstpage_image] =>[orig_patent_app_number] => 12327763
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/327763 | Package in package semiconductor device | Dec 2, 2008 | Issued |
Array
(
[id] => 6240304
[patent_doc_number] => 20100133666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-03
[patent_title] => 'DEVICE INCLUDING A SEMICONDUCTOR CHIP AND METAL FOILS'
[patent_app_type] => utility
[patent_app_number] => 12/326529
[patent_app_country] => US
[patent_app_date] => 2008-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 45
[patent_no_of_words] => 8823
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0133/20100133666.pdf
[firstpage_image] =>[orig_patent_app_number] => 12326529
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/326529 | Device including a semiconductor chip and metal foils | Dec 1, 2008 | Issued |
Array
(
[id] => 4644933
[patent_doc_number] => 08022540
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-20
[patent_title] => 'Chip package'
[patent_app_type] => utility
[patent_app_number] => 12/325289
[patent_app_country] => US
[patent_app_date] => 2008-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 1352
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/022/08022540.pdf
[firstpage_image] =>[orig_patent_app_number] => 12325289
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/325289 | Chip package | Nov 30, 2008 | Issued |
Array
(
[id] => 54140
[patent_doc_number] => 07772694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-10
[patent_title] => 'Integrated circuit module and method of packaging same'
[patent_app_type] => utility
[patent_app_number] => 12/323780
[patent_app_country] => US
[patent_app_date] => 2008-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 5393
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/772/07772694.pdf
[firstpage_image] =>[orig_patent_app_number] => 12323780
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/323780 | Integrated circuit module and method of packaging same | Nov 25, 2008 | Issued |
Array
(
[id] => 5573008
[patent_doc_number] => 20090140369
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-04
[patent_title] => 'SEMICONDUCTOR POWER MODULE PACKAGE WITHOUT TEMPERATURE SENSOR MOUNTED THEREON AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/277699
[patent_app_country] => US
[patent_app_date] => 2008-11-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4806
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0140/20090140369.pdf
[firstpage_image] =>[orig_patent_app_number] => 12277699
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/277699 | Semiconductor power module package without temperature sensor mounted thereon and method of fabricating the same | Nov 24, 2008 | Issued |
Array
(
[id] => 6519152
[patent_doc_number] => 20100123226
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-20
[patent_title] => 'SEMICONDUCTOR PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/273559
[patent_app_country] => US
[patent_app_date] => 2008-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2625
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0123/20100123226.pdf
[firstpage_image] =>[orig_patent_app_number] => 12273559
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/273559 | Semiconductor package | Nov 18, 2008 | Issued |
Array
(
[id] => 4634993
[patent_doc_number] => 08013447
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-06
[patent_title] => 'Semiconductor device and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 12/271626
[patent_app_country] => US
[patent_app_date] => 2008-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 1347
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/013/08013447.pdf
[firstpage_image] =>[orig_patent_app_number] => 12271626
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/271626 | Semiconductor device and method for fabricating the same | Nov 13, 2008 | Issued |
Array
(
[id] => 5275552
[patent_doc_number] => 20090127684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'LEADFRAME FOR LEADLESS PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/262580
[patent_app_country] => US
[patent_app_date] => 2008-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1847
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0127/20090127684.pdf
[firstpage_image] =>[orig_patent_app_number] => 12262580
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/262580 | LEADFRAME FOR LEADLESS PACKAGE | Oct 30, 2008 | Abandoned |
Array
(
[id] => 5518651
[patent_doc_number] => 20090026632
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-29
[patent_title] => 'CHIP-TO-CHIP PACKAGE AND PROCESS THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/244553
[patent_app_country] => US
[patent_app_date] => 2008-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 8313
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0026/20090026632.pdf
[firstpage_image] =>[orig_patent_app_number] => 12244553
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/244553 | CHIP-TO-CHIP PACKAGE AND PROCESS THEREOF | Oct 1, 2008 | Abandoned |
Array
(
[id] => 5425882
[patent_doc_number] => 20090085192
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-02
[patent_title] => 'Packaging substrate structure having semiconductor chip embedded therein and fabricating method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/285259
[patent_app_country] => US
[patent_app_date] => 2008-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3158
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0085/20090085192.pdf
[firstpage_image] =>[orig_patent_app_number] => 12285259
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/285259 | Packaging substrate structure having semiconductor chip embedded therein and fabricating method thereof | Sep 30, 2008 | Abandoned |
Array
(
[id] => 5389038
[patent_doc_number] => 20090206350
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-20
[patent_title] => 'LED chip package structure with different LED spacings and a method for making the same'
[patent_app_type] => utility
[patent_app_number] => 12/285190
[patent_app_country] => US
[patent_app_date] => 2008-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 4281
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0206/20090206350.pdf
[firstpage_image] =>[orig_patent_app_number] => 12285190
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/285190 | LED chip package structure with different LED spacings and a method for making the same | Sep 29, 2008 | Issued |
Array
(
[id] => 92969
[patent_doc_number] => 07737477
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-15
[patent_title] => 'CMOS image sensor and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/232752
[patent_app_country] => US
[patent_app_date] => 2008-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 5194
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/737/07737477.pdf
[firstpage_image] =>[orig_patent_app_number] => 12232752
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/232752 | CMOS image sensor and method for manufacturing the same | Sep 22, 2008 | Issued |
Array
(
[id] => 8533912
[patent_doc_number] => 08310069
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-11-13
[patent_title] => 'Semiconductor package having marking layer'
[patent_app_type] => utility
[patent_app_number] => 12/211274
[patent_app_country] => US
[patent_app_date] => 2008-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4531
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12211274
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/211274 | Semiconductor package having marking layer | Sep 15, 2008 | Issued |
Array
(
[id] => 5493430
[patent_doc_number] => 20090261458
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-22
[patent_title] => 'THROUGH-ELECTRODE, CIRCUIT BOARD HAVING A THROUGH-ELECTRODE, SEMICONDUCTOR PACKAGE HAVING A THROUGH-ELECTRODE, AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SEMICONDUCTOR CHIP OR PACKAGE HAVING A THROUGH-ELECTRODE'
[patent_app_type] => utility
[patent_app_number] => 12/209584
[patent_app_country] => US
[patent_app_date] => 2008-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5422
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0261/20090261458.pdf
[firstpage_image] =>[orig_patent_app_number] => 12209584
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/209584 | Through-electrode, circuit board having a through-electrode, semiconductor package having a through-electrode, and stacked semiconductor package having the semiconductor chip or package having a through-electrode | Sep 11, 2008 | Issued |
Array
(
[id] => 5549886
[patent_doc_number] => 20090283872
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-19
[patent_title] => 'PACKAGE STRUCTURE OF THREE-DIMENSIONAL STACKING DICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/205443
[patent_app_country] => US
[patent_app_date] => 2008-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4849
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20090283872.pdf
[firstpage_image] =>[orig_patent_app_number] => 12205443
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/205443 | Package structure of three-dimensional stacking dice and method for manufacturing the same | Sep 4, 2008 | Issued |
Array
(
[id] => 5461689
[patent_doc_number] => 20090321889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-31
[patent_title] => 'Scribe Seal Connection'
[patent_app_type] => utility
[patent_app_number] => 12/201394
[patent_app_country] => US
[patent_app_date] => 2008-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6040
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0321/20090321889.pdf
[firstpage_image] =>[orig_patent_app_number] => 12201394
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/201394 | Scribe seal connection | Aug 28, 2008 | Issued |
Array
(
[id] => 4756689
[patent_doc_number] => 20080308914
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'CHIP PACKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/198517
[patent_app_country] => US
[patent_app_date] => 2008-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2971
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0308/20080308914.pdf
[firstpage_image] =>[orig_patent_app_number] => 12198517
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/198517 | CHIP PACKAGE | Aug 25, 2008 | Abandoned |
Array
(
[id] => 7540864
[patent_doc_number] => 08058708
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-15
[patent_title] => 'Through hole interconnection structure for semiconductor wafer'
[patent_app_type] => utility
[patent_app_number] => 12/194670
[patent_app_country] => US
[patent_app_date] => 2008-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 42
[patent_no_of_words] => 11223
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/058/08058708.pdf
[firstpage_image] =>[orig_patent_app_number] => 12194670
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/194670 | Through hole interconnection structure for semiconductor wafer | Aug 19, 2008 | Issued |
Array
(
[id] => 6448483
[patent_doc_number] => 20100038801
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-18
[patent_title] => 'Corrosion Control of Stacked Integrated Circuits'
[patent_app_type] => utility
[patent_app_number] => 12/192514
[patent_app_country] => US
[patent_app_date] => 2008-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2431
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20100038801.pdf
[firstpage_image] =>[orig_patent_app_number] => 12192514
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/192514 | Corrosion control of stacked integrated circuits | Aug 14, 2008 | Issued |