Mark V Prenty

Array ( [id] => 5116122 [patent_doc_number] => 20070137835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-21 [patent_title] => 'Thermal conductive apparatus' [patent_app_type] => utility [patent_app_number] => 11/638208 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2875 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20070137835.pdf [firstpage_image] =>[orig_patent_app_number] => 11638208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4833449 [patent_doc_number] => 20080131996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Reverse build-up process for fine bump pitch approach' [patent_app_type] => utility [patent_app_number] => 11/633718 [patent_app_country] => US [patent_app_date] => 2006-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2563 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20080131996.pdf [firstpage_image] =>[orig_patent_app_number] => 11633718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5233958 [patent_doc_number] => 20070126113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-07 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/607009 [patent_app_country] => US [patent_app_date] => 2006-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2614 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20070126113.pdf [firstpage_image] =>[orig_patent_app_number] => 11607009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5076952 [patent_doc_number] => 20070120176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'EEPROM' [patent_app_type] => utility [patent_app_number] => 11/604208 [patent_app_country] => US [patent_app_date] => 2006-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6211 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20070120176.pdf [firstpage_image] =>[orig_patent_app_number] => 11604208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4968544 [patent_doc_number] => 20070108546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'PHOTOELECTRIC CONVERTER AND IMAGING SYSTEM INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/559249 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5063 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108546.pdf [firstpage_image] =>[orig_patent_app_number] => 11559249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 837334 [patent_doc_number] => 07394152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-01 [patent_title] => 'Wafer level chip size packaged chip device with an N-shape junction inside and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/559129 [patent_app_country] => US [patent_app_date] => 2006-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 1984 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/394/07394152.pdf [firstpage_image] =>[orig_patent_app_number] => 11559129 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4443699 [patent_doc_number] => 07928540 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Integrated circuit package system' [patent_app_type] => utility [patent_app_number] => 11/558589 [patent_app_country] => US [patent_app_date] => 2006-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/928/07928540.pdf [firstpage_image] =>[orig_patent_app_number] => 11558589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5213715 [patent_doc_number] => 20070102795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'RADIATOR PLATE AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/558228 [patent_app_country] => US [patent_app_date] => 2006-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4279 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20070102795.pdf [firstpage_image] =>[orig_patent_app_number] => 11558228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4986007 [patent_doc_number] => 20070152345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-05 [patent_title] => 'Stacked chip packaging structure' [patent_app_type] => utility [patent_app_number] => 11/592848 [patent_app_country] => US [patent_app_date] => 2006-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3646 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20070152345.pdf [firstpage_image] =>[orig_patent_app_number] => 11592848 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5213749 [patent_doc_number] => 20070102829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'CHIP STRUCTURE WITH SOLDER BUMP AND METHOD FOR PRODUCING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/556568 [patent_app_country] => US [patent_app_date] => 2006-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3683 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20070102829.pdf [firstpage_image] =>[orig_patent_app_number] => 11556568 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4435459 [patent_doc_number] => 07898093 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-01 [patent_title] => 'Exposed die overmolded flip chip package and fabrication method' [patent_app_type] => utility [patent_app_number] => 11/592889 [patent_app_country] => US [patent_app_date] => 2006-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6668 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/898/07898093.pdf [firstpage_image] =>[orig_patent_app_number] => 11592889 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 63703 [patent_doc_number] => 07763986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-27 [patent_title] => 'Semiconductor chip, film substrate, and related semiconductor chip package' [patent_app_type] => utility [patent_app_number] => 11/589138 [patent_app_country] => US [patent_app_date] => 2006-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5163 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/763/07763986.pdf [firstpage_image] =>[orig_patent_app_number] => 11589138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4971478 [patent_doc_number] => 20070111480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Wafer product and processing method therefor' [patent_app_type] => utility [patent_app_number] => 11/586558 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10408 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111480.pdf [firstpage_image] =>[orig_patent_app_number] => 11586558 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8676021 [patent_doc_number] => 08384136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Demultiplexed nanowire sensor array for detection of chemical and biological species' [patent_app_type] => utility [patent_app_number] => 11/584028 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5289 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11584028 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5038252 [patent_doc_number] => 20070090534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Semiconductor module including a plurality of IC chips therein' [patent_app_type] => utility [patent_app_number] => 11/582958 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4195 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20070090534.pdf [firstpage_image] =>[orig_patent_app_number] => 11582958 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8233264 [patent_doc_number] => 08198709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Potted integrated circuit device with aluminum case' [patent_app_type] => utility [patent_app_number] => 11/582699 [patent_app_country] => US [patent_app_date] => 2006-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2224 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198709.pdf [firstpage_image] =>[orig_patent_app_number] => 11582699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5038267 [patent_doc_number] => 20070090549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/582348 [patent_app_country] => US [patent_app_date] => 2006-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2026 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20070090549.pdf [firstpage_image] =>[orig_patent_app_number] => 11582348 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 82837 [patent_doc_number] => 07745906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Semiconductor device having spaced unit regions and heavily doped semiconductor layer' [patent_app_type] => utility [patent_app_number] => 11/550189 [patent_app_country] => US [patent_app_date] => 2006-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 59 [patent_no_of_words] => 18231 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 341 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745906.pdf [firstpage_image] =>[orig_patent_app_number] => 11550189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5031730 [patent_doc_number] => 20070096269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'LEADFRAME FOR SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 11/539239 [patent_app_country] => US [patent_app_date] => 2006-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2434 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0096/20070096269.pdf [firstpage_image] =>[orig_patent_app_number] => 11539239 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 65068 [patent_doc_number] => 07759786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Electronic circuit chip, and electronic circuit device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/543079 [patent_app_country] => US [patent_app_date] => 2006-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 4885 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/759/07759786.pdf [firstpage_image] =>[orig_patent_app_number] => 11543079 [rel_patent_id] =>[rel_patent_doc_number] =>)