Mark V Prenty
Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )
Most Active Art Unit | 2822 |
Art Unit(s) | 2814, 2503, 2822, 2899 |
Total Applications | 2970 |
Issued Applications | 2517 |
Pending Applications | 67 |
Abandoned Applications | 386 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5191882
[patent_doc_number] => 20070080364
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'White light emitting device capable of adjusting color temperature'
[patent_app_type] => utility
[patent_app_number] => 11/244226
[patent_app_country] => US
[patent_app_date] => 2005-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2409
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0080/20070080364.pdf
[firstpage_image] =>[orig_patent_app_number] => 11244226
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/244226 | White light emitting device capable of adjusting color temperature | Oct 5, 2005 | Abandoned |
Array
(
[id] => 5133780
[patent_doc_number] => 20070075409
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-05
[patent_title] => 'Method of forming a molded array package device having an exposed tab and structure'
[patent_app_type] => utility
[patent_app_number] => 11/243195
[patent_app_country] => US
[patent_app_date] => 2005-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4210
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0075/20070075409.pdf
[firstpage_image] =>[orig_patent_app_number] => 11243195
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/243195 | Method of forming a molded array package device having an exposed tab and structure | Oct 4, 2005 | Issued |
Array
(
[id] => 5718547
[patent_doc_number] => 20060071320
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-06
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/242955
[patent_app_country] => US
[patent_app_date] => 2005-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5559
[patent_no_of_claims] => 6
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[pdf_file] => publications/A1/0071/20060071320.pdf
[firstpage_image] =>[orig_patent_app_number] => 11242955
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242955 | Semiconductor device | Oct 4, 2005 | Issued |
Array
(
[id] => 5810761
[patent_doc_number] => 20060081869
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-20
[patent_title] => 'Flip-chip electrode light-emitting element formed by multilayer coatings'
[patent_app_type] => utility
[patent_app_number] => 11/242035
[patent_app_country] => US
[patent_app_date] => 2005-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2916
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20060081869.pdf
[firstpage_image] =>[orig_patent_app_number] => 11242035
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242035 | Flip-chip electrode light-emitting element formed by multilayer coatings | Oct 3, 2005 | Abandoned |
Array
(
[id] => 593006
[patent_doc_number] => 07436063
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-14
[patent_title] => 'Packaging substrate and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/242125
[patent_app_country] => US
[patent_app_date] => 2005-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2032
[patent_no_of_claims] => 6
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[patent_words_short_claim] => 179
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/436/07436063.pdf
[firstpage_image] =>[orig_patent_app_number] => 11242125
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242125 | Packaging substrate and semiconductor device | Oct 3, 2005 | Issued |
Array
(
[id] => 826810
[patent_doc_number] => 07402474
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-22
[patent_title] => 'Manufacturing method of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/233648
[patent_app_country] => US
[patent_app_date] => 2005-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5239
[patent_no_of_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/402/07402474.pdf
[firstpage_image] =>[orig_patent_app_number] => 11233648
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/233648 | Manufacturing method of semiconductor device | Sep 22, 2005 | Issued |
Array
(
[id] => 5599511
[patent_doc_number] => 20060289856
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'Semiconductor device and production method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/229745
[patent_app_country] => US
[patent_app_date] => 2005-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 15020
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0289/20060289856.pdf
[firstpage_image] =>[orig_patent_app_number] => 11229745
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/229745 | Semiconductor device and production method thereof | Sep 19, 2005 | Issued |
Array
(
[id] => 5810828
[patent_doc_number] => 20060081936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-20
[patent_title] => 'Semiconductor device for low power operation'
[patent_app_type] => utility
[patent_app_number] => 11/229226
[patent_app_country] => US
[patent_app_date] => 2005-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4446
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20060081936.pdf
[firstpage_image] =>[orig_patent_app_number] => 11229226
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/229226 | Semiconductor device for low power operation | Sep 15, 2005 | Abandoned |
Array
(
[id] => 5634955
[patent_doc_number] => 20060065928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-30
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/227085
[patent_app_country] => US
[patent_app_date] => 2005-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 9168
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[pdf_file] => publications/A1/0065/20060065928.pdf
[firstpage_image] =>[orig_patent_app_number] => 11227085
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/227085 | Semiconductor device | Sep 15, 2005 | Abandoned |
Array
(
[id] => 203409
[patent_doc_number] => 07633129
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-12-15
[patent_title] => 'Memory devices with active and passive layers having multiple self-assembled sublayers'
[patent_app_type] => utility
[patent_app_number] => 11/228975
[patent_app_country] => US
[patent_app_date] => 2005-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2647
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 27
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/633/07633129.pdf
[firstpage_image] =>[orig_patent_app_number] => 11228975
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/228975 | Memory devices with active and passive layers having multiple self-assembled sublayers | Sep 15, 2005 | Issued |
Array
(
[id] => 5713240
[patent_doc_number] => 20060076603
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-04-13
[patent_title] => 'Semiconductor device having polycide wiring layer, and manufacturing method of the same'
[patent_app_type] => utility
[patent_app_number] => 11/226465
[patent_app_country] => US
[patent_app_date] => 2005-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6969
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0076/20060076603.pdf
[firstpage_image] =>[orig_patent_app_number] => 11226465
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/226465 | Semiconductor device having polycide wiring layer, and manufacturing method of the same | Sep 14, 2005 | Abandoned |
Array
(
[id] => 5724120
[patent_doc_number] => 20060054880
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'High performance hyperspectral detectors using photon controlling cavities'
[patent_app_type] => utility
[patent_app_number] => 11/225006
[patent_app_country] => US
[patent_app_date] => 2005-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0054/20060054880.pdf
[firstpage_image] =>[orig_patent_app_number] => 11225006
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/225006 | High performance hyperspectral detectors using photon controlling cavities | Sep 13, 2005 | Issued |
Array
(
[id] => 5724194
[patent_doc_number] => 20060054954
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Lateral MOS device with minimization of parasitic elements'
[patent_app_type] => utility
[patent_app_number] => 11/223796
[patent_app_country] => US
[patent_app_date] => 2005-09-08
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 5829
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[pdf_file] => publications/A1/0054/20060054954.pdf
[firstpage_image] =>[orig_patent_app_number] => 11223796
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/223796 | Lateral MOS device with minimization of parasitic elements | Sep 7, 2005 | Issued |
Array
(
[id] => 5180690
[patent_doc_number] => 20070052032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-08
[patent_title] => 'Electrostatic discharge device with latch-up immunity'
[patent_app_type] => utility
[patent_app_number] => 11/223745
[patent_app_country] => US
[patent_app_date] => 2005-09-08
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20070052032.pdf
[firstpage_image] =>[orig_patent_app_number] => 11223745
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/223745 | Electrostatic discharge device with latch-up immunity | Sep 7, 2005 | Abandoned |
Array
(
[id] => 5708078
[patent_doc_number] => 20060049422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-09
[patent_title] => 'Surface mount LED'
[patent_app_type] => utility
[patent_app_number] => 11/214805
[patent_app_country] => US
[patent_app_date] => 2005-08-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0049/20060049422.pdf
[firstpage_image] =>[orig_patent_app_number] => 11214805
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/214805 | Surface mount LED | Aug 30, 2005 | Abandoned |
Array
(
[id] => 5898207
[patent_doc_number] => 20060043440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Imaging device and imaging system'
[patent_app_type] => utility
[patent_app_number] => 11/214806
[patent_app_country] => US
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[pdf_file] => publications/A1/0043/20060043440.pdf
[firstpage_image] =>[orig_patent_app_number] => 11214806
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/214806 | Imaging device and imaging system | Aug 30, 2005 | Issued |
Array
(
[id] => 5898209
[patent_doc_number] => 20060043442
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-02
[patent_title] => 'Photoelectric conversion device, method for manufacturing the same and image pickup system'
[patent_app_type] => utility
[patent_app_number] => 11/214846
[patent_app_country] => US
[patent_app_date] => 2005-08-31
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[pdf_file] => publications/A1/0043/20060043442.pdf
[firstpage_image] =>[orig_patent_app_number] => 11214846
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/214846 | Photoelectric conversion device, method for manufacturing the same and image pickup system | Aug 30, 2005 | Issued |
Array
(
[id] => 4992253
[patent_doc_number] => 20070007597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-11
[patent_title] => 'ESD structure having different thickness gate oxides'
[patent_app_type] => utility
[patent_app_number] => 11/215775
[patent_app_country] => US
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[pdf_file] => publications/A1/0007/20070007597.pdf
[firstpage_image] =>[orig_patent_app_number] => 11215775
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/215775 | ESD structure having different thickness gate oxides | Aug 29, 2005 | Abandoned |
Array
(
[id] => 885783
[patent_doc_number] => 07352034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-01
[patent_title] => 'Semiconductor structures integrating damascene-body FinFET\'s and planar devices on a common substrate and methods for forming such semiconductor structures'
[patent_app_type] => utility
[patent_app_number] => 11/211956
[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/352/07352034.pdf
[firstpage_image] =>[orig_patent_app_number] => 11211956
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/211956 | Semiconductor structures integrating damascene-body FinFET's and planar devices on a common substrate and methods for forming such semiconductor structures | Aug 24, 2005 | Issued |
Array
(
[id] => 5145779
[patent_doc_number] => 20070045833
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Copper bump barrier cap to reduce electrical resistance'
[patent_app_type] => utility
[patent_app_number] => 11/212999
[patent_app_country] => US
[patent_app_date] => 2005-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_claims] => 31
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20070045833.pdf
[firstpage_image] =>[orig_patent_app_number] => 11212999
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/212999 | Copper bump barrier cap to reduce electrical resistance | Aug 24, 2005 | Abandoned |