Mark V Prenty
Examiner (ID: 1781, Phone: (571)272-1843 , Office: P/2822 )
Most Active Art Unit | 2822 |
Art Unit(s) | 2814, 2503, 2822, 2899 |
Total Applications | 2970 |
Issued Applications | 2517 |
Pending Applications | 67 |
Abandoned Applications | 386 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5672613
[patent_doc_number] => 20060177968
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Method for fabricating semiconductor packages with semiconductor chips'
[patent_app_type] => utility
[patent_app_number] => 11/200009
[patent_app_country] => US
[patent_app_date] => 2005-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2280
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0177/20060177968.pdf
[firstpage_image] =>[orig_patent_app_number] => 11200009
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/200009 | Method for fabricating semiconductor packages with semiconductor chips | Aug 9, 2005 | Abandoned |
Array
(
[id] => 5588823
[patent_doc_number] => 20060038274
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-23
[patent_title] => '3D circuit module, multilayer 3D circuit module formed thereof, mobile terminal device using the circuit modules and method for manufacturing the circuit modules'
[patent_app_type] => utility
[patent_app_number] => 11/196269
[patent_app_country] => US
[patent_app_date] => 2005-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6087
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20060038274.pdf
[firstpage_image] =>[orig_patent_app_number] => 11196269
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/196269 | 3D circuit module, multilayer 3D circuit module formed thereof, mobile terminal device using the circuit modules and method for manufacturing the circuit modules | Aug 3, 2005 | Issued |
Array
(
[id] => 5818009
[patent_doc_number] => 20060022322
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Small structure and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/192358
[patent_app_country] => US
[patent_app_date] => 2005-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5205
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0022/20060022322.pdf
[firstpage_image] =>[orig_patent_app_number] => 11192358
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/192358 | Small structure and method for fabricating the same | Jul 28, 2005 | Issued |
Array
(
[id] => 7230005
[patent_doc_number] => 20050255672
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Method and resulting structure for manufacturing semiconductor substrates'
[patent_app_type] => utility
[patent_app_number] => 11/185238
[patent_app_country] => US
[patent_app_date] => 2005-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4858
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 13
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0255/20050255672.pdf
[firstpage_image] =>[orig_patent_app_number] => 11185238
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/185238 | Method and resulting structure for manufacturing semiconductor substrates | Jul 18, 2005 | Abandoned |
Array
(
[id] => 588938
[patent_doc_number] => 07435615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-14
[patent_title] => 'Method for fabricating CMOS image sensor'
[patent_app_type] => utility
[patent_app_number] => 11/184289
[patent_app_country] => US
[patent_app_date] => 2005-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2416
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/435/07435615.pdf
[firstpage_image] =>[orig_patent_app_number] => 11184289
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/184289 | Method for fabricating CMOS image sensor | Jul 17, 2005 | Issued |
Array
(
[id] => 5894997
[patent_doc_number] => 20060003536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-05
[patent_title] => 'Method for fabricating a trench capacitor with an insulation collar which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell'
[patent_app_type] => utility
[patent_app_number] => 11/152968
[patent_app_country] => US
[patent_app_date] => 2005-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 3111
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20060003536.pdf
[firstpage_image] =>[orig_patent_app_number] => 11152968
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/152968 | Method for fabricating a trench capacitor with an insulation collar which is electrically connected to a substrate on one side via a buried contact, in particular for a semiconductor memory cell | Jun 14, 2005 | Abandoned |
Array
(
[id] => 5642866
[patent_doc_number] => 20060281321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-14
[patent_title] => 'Nanowire sensor device structures'
[patent_app_type] => utility
[patent_app_number] => 11/152289
[patent_app_country] => US
[patent_app_date] => 2005-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2066
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0281/20060281321.pdf
[firstpage_image] =>[orig_patent_app_number] => 11152289
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/152289 | Nanowire sensor device structures | Jun 12, 2005 | Abandoned |
Array
(
[id] => 5776897
[patent_doc_number] => 20060105537
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-18
[patent_title] => 'Method for forming storage electrode of semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/148559
[patent_app_country] => US
[patent_app_date] => 2005-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 2620
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0105/20060105537.pdf
[firstpage_image] =>[orig_patent_app_number] => 11148559
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/148559 | Method for forming storage electrode of semiconductor device | Jun 8, 2005 | Abandoned |
Array
(
[id] => 6952281
[patent_doc_number] => 20050227376
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Semiconductor display device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/145228
[patent_app_country] => US
[patent_app_date] => 2005-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 13449
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20050227376.pdf
[firstpage_image] =>[orig_patent_app_number] => 11145228
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/145228 | Semiconductor display device and method of manufacturing the same | Jun 5, 2005 | Issued |
Array
(
[id] => 270450
[patent_doc_number] => 07563686
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-21
[patent_title] => 'Method for forming a memory device with a recessed gate'
[patent_app_type] => utility
[patent_app_number] => 11/140889
[patent_app_country] => US
[patent_app_date] => 2005-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 18
[patent_no_of_words] => 2672
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/563/07563686.pdf
[firstpage_image] =>[orig_patent_app_number] => 11140889
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/140889 | Method for forming a memory device with a recessed gate | May 30, 2005 | Issued |
Array
(
[id] => 5765913
[patent_doc_number] => 20050263903
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-01
[patent_title] => 'Method for pattern metalization of substrates'
[patent_app_type] => utility
[patent_app_number] => 11/070139
[patent_app_country] => US
[patent_app_date] => 2005-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 12790
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0263/20050263903.pdf
[firstpage_image] =>[orig_patent_app_number] => 11070139
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/070139 | Method for pattern metalization of substrates | Feb 28, 2005 | Abandoned |
Array
(
[id] => 5101391
[patent_doc_number] => 20070184653
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-09
[patent_title] => 'Integrated circuit with a very small-sized reading diode'
[patent_app_type] => utility
[patent_app_number] => 10/591178
[patent_app_country] => US
[patent_app_date] => 2005-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3171
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0184/20070184653.pdf
[firstpage_image] =>[orig_patent_app_number] => 10591178
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/591178 | Integrated circuit with a very small-sized reading diode | Feb 20, 2005 | Abandoned |
Array
(
[id] => 7108546
[patent_doc_number] => 20050205999
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Method for pattern metalization of substrates'
[patent_app_type] => utility
[patent_app_number] => 10/931154
[patent_app_country] => US
[patent_app_date] => 2004-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7795
[patent_no_of_claims] => 69
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20050205999.pdf
[firstpage_image] =>[orig_patent_app_number] => 10931154
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/931154 | Method for pattern metalization of substrates | Aug 29, 2004 | Abandoned |