Search

Mark V. Prenty

Examiner (ID: 10336, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2503, 2814, 2899, 2822
Total Applications
3023
Issued Applications
2591
Pending Applications
61
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1102737 [patent_doc_number] => 06815796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Composite module and process of producing same' [patent_app_type] => B2 [patent_app_number] => 10/313037 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 65 [patent_no_of_words] => 11123 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815796.pdf [firstpage_image] =>[orig_patent_app_number] => 10313037 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313037
Composite module and process of producing same Dec 5, 2002 Issued
Array ( [id] => 7963823 [patent_doc_number] => 06680516 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Controlled thickness gate stack' [patent_app_type] => B1 [patent_app_number] => 10/313267 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680516.pdf [firstpage_image] =>[orig_patent_app_number] => 10313267 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313267
Controlled thickness gate stack Dec 5, 2002 Issued
Array ( [id] => 6680938 [patent_doc_number] => 20030116802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Method of manufacturing semiconductor substrate, semiconductor substrate, electro-optical apparatus and electronic equipment' [patent_app_type] => new [patent_app_number] => 10/307297 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9909 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20030116802.pdf [firstpage_image] =>[orig_patent_app_number] => 10307297 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307297
Method of manufacturing semiconductor substrate, semiconductor substrate, electro-optical apparatus and electronic equipment Dec 1, 2002 Abandoned
Array ( [id] => 1153196 [patent_doc_number] => 06770954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Semiconductor device with SI-GE layer-containing low resistance, tunable contact' [patent_app_type] => B2 [patent_app_number] => 10/305147 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 3709 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770954.pdf [firstpage_image] =>[orig_patent_app_number] => 10305147 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305147
Semiconductor device with SI-GE layer-containing low resistance, tunable contact Nov 26, 2002 Issued
Array ( [id] => 6865255 [patent_doc_number] => 20030190781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-09 [patent_title] => 'MEMORY MASKING FOR PERIPHERY SALICIDATION OF ACTIVE REGIONS' [patent_app_type] => new [patent_app_number] => 10/305437 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3782 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20030190781.pdf [firstpage_image] =>[orig_patent_app_number] => 10305437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305437
Memory masking for periphery salicidation of active regions Nov 25, 2002 Issued
Array ( [id] => 717221 [patent_doc_number] => 07053487 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/294937 [patent_app_country] => US [patent_app_date] => 2002-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 38 [patent_no_of_words] => 24235 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053487.pdf [firstpage_image] =>[orig_patent_app_number] => 10294937 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/294937
Semiconductor device Nov 14, 2002 Issued
Array ( [id] => 1249081 [patent_doc_number] => 06674104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Bipolar transistor' [patent_app_type] => B2 [patent_app_number] => 10/275558 [patent_app_country] => US [patent_app_date] => 2002-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 2173 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674104.pdf [firstpage_image] =>[orig_patent_app_number] => 10275558 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/275558
Bipolar transistor Nov 6, 2002 Issued
Array ( [id] => 963971 [patent_doc_number] => 06949784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Zero-cost non-volatile memory cell with write and erase features' [patent_app_type] => utility [patent_app_number] => 10/285977 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2526 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/949/06949784.pdf [firstpage_image] =>[orig_patent_app_number] => 10285977 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285977
Zero-cost non-volatile memory cell with write and erase features Oct 31, 2002 Issued
Array ( [id] => 1113720 [patent_doc_number] => 06803621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-12 [patent_title] => 'Oxygen barrier for cell container process' [patent_app_type] => B2 [patent_app_number] => 10/286155 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2975 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803621.pdf [firstpage_image] =>[orig_patent_app_number] => 10286155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286155
Oxygen barrier for cell container process Oct 30, 2002 Issued
Array ( [id] => 1193719 [patent_doc_number] => 06730940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Enhanced brightness light emitting device spot emitter' [patent_app_type] => B1 [patent_app_number] => 10/283737 [patent_app_country] => US [patent_app_date] => 2002-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 3457 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/730/06730940.pdf [firstpage_image] =>[orig_patent_app_number] => 10283737 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/283737
Enhanced brightness light emitting device spot emitter Oct 28, 2002 Issued
Array ( [id] => 1288587 [patent_doc_number] => 06639284 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Compensated-well electrostatic discharge protection structure' [patent_app_type] => B1 [patent_app_number] => 10/280829 [patent_app_country] => US [patent_app_date] => 2002-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 9489 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639284.pdf [firstpage_image] =>[orig_patent_app_number] => 10280829 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/280829
Compensated-well electrostatic discharge protection structure Oct 24, 2002 Issued
Array ( [id] => 985462 [patent_doc_number] => 06924190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Use of gate electrode workfunction to improve DRAM refresh' [patent_app_type] => utility [patent_app_number] => 10/279094 [patent_app_country] => US [patent_app_date] => 2002-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4097 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924190.pdf [firstpage_image] =>[orig_patent_app_number] => 10279094 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279094
Use of gate electrode workfunction to improve DRAM refresh Oct 23, 2002 Issued
Array ( [id] => 7159402 [patent_doc_number] => 20040075121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Semiconductor device having a U-shaped gate structure' [patent_app_type] => new [patent_app_number] => 10/274867 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3382 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20040075121.pdf [firstpage_image] =>[orig_patent_app_number] => 10274867 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/274867
Semiconductor device having a U-shaped gate structure Oct 21, 2002 Issued
Array ( [id] => 7627854 [patent_doc_number] => 06806584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Semiconductor device structure including multiple fets having different spacer widths' [patent_app_type] => B2 [patent_app_number] => 10/277907 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 1847 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806584.pdf [firstpage_image] =>[orig_patent_app_number] => 10277907 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/277907
Semiconductor device structure including multiple fets having different spacer widths Oct 20, 2002 Issued
Array ( [id] => 6646874 [patent_doc_number] => 20030075752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/271727 [patent_app_country] => US [patent_app_date] => 2002-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7900 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075752.pdf [firstpage_image] =>[orig_patent_app_number] => 10271727 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/271727
Semiconductor device and method for manufacturing the same Oct 16, 2002 Issued
Array ( [id] => 7632738 [patent_doc_number] => 06664596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Stacked LDD high frequency LDMOSFET' [patent_app_type] => B2 [patent_app_number] => 10/272137 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2503 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664596.pdf [firstpage_image] =>[orig_patent_app_number] => 10272137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272137
Stacked LDD high frequency LDMOSFET Oct 15, 2002 Issued
Array ( [id] => 1284558 [patent_doc_number] => 06642597 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Inter-layer interconnection structure for large electrical connections' [patent_app_type] => B1 [patent_app_number] => 10/272767 [patent_app_country] => US [patent_app_date] => 2002-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 4867 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/642/06642597.pdf [firstpage_image] =>[orig_patent_app_number] => 10272767 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272767
Inter-layer interconnection structure for large electrical connections Oct 15, 2002 Issued
Array ( [id] => 1053728 [patent_doc_number] => 06858899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Thin film transistor with metal oxide layer and method of making same' [patent_app_type] => utility [patent_app_number] => 10/270127 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4561 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858899.pdf [firstpage_image] =>[orig_patent_app_number] => 10270127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/270127
Thin film transistor with metal oxide layer and method of making same Oct 14, 2002 Issued
Array ( [id] => 7632743 [patent_doc_number] => 06664591 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Insulated gate semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/268997 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5737 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664591.pdf [firstpage_image] =>[orig_patent_app_number] => 10268997 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268997
Insulated gate semiconductor device Oct 10, 2002 Issued
Array ( [id] => 6646766 [patent_doc_number] => 20030075737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Bipolar transistor and the method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/268097 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5433 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075737.pdf [firstpage_image] =>[orig_patent_app_number] => 10268097 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268097
Bipolar transistor and the method of manufacturing the same Oct 9, 2002 Issued
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