Search

Mark V. Prenty

Examiner (ID: 10336, Phone: (571)272-1843 , Office: P/2822 )

Most Active Art Unit
2822
Art Unit(s)
2503, 2814, 2899, 2822
Total Applications
3023
Issued Applications
2591
Pending Applications
61
Abandoned Applications
386

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1455343 [patent_doc_number] => 06462361 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure' [patent_app_type] => B1 [patent_app_number] => 09/662587 [patent_app_country] => US [patent_app_date] => 2000-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 22755 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462361.pdf [firstpage_image] =>[orig_patent_app_number] => 09662587 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/662587
GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure Sep 14, 2000 Issued
Array ( [id] => 1516125 [patent_doc_number] => 06420748 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Borderless bitline and wordline DRAM structure' [patent_app_type] => B1 [patent_app_number] => 09/657968 [patent_app_country] => US [patent_app_date] => 2000-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2892 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420748.pdf [firstpage_image] =>[orig_patent_app_number] => 09657968 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/657968
Borderless bitline and wordline DRAM structure Sep 7, 2000 Issued
Array ( [id] => 1580299 [patent_doc_number] => 06448618 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/640707 [patent_app_country] => US [patent_app_date] => 2000-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 43 [patent_no_of_words] => 11322 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448618.pdf [firstpage_image] =>[orig_patent_app_number] => 09640707 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/640707
Semiconductor device and method for manufacturing the same Aug 17, 2000 Issued
Array ( [id] => 1351826 [patent_doc_number] => 06580124 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Multigate semiconductor device with vertical channel current and method of fabrication' [patent_app_type] => B1 [patent_app_number] => 09/639577 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 6125 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580124.pdf [firstpage_image] =>[orig_patent_app_number] => 09639577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639577
Multigate semiconductor device with vertical channel current and method of fabrication Aug 13, 2000 Issued
Array ( [id] => 1516083 [patent_doc_number] => 06420730 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-16 [patent_title] => 'Elevated transistor fabrication technique' [patent_app_type] => B1 [patent_app_number] => 09/591871 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3195 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/420/06420730.pdf [firstpage_image] =>[orig_patent_app_number] => 09591871 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/591871
Elevated transistor fabrication technique Jun 11, 2000 Issued
Array ( [id] => 1497020 [patent_doc_number] => 06404018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Static memory cell and method of manufacturing a static memory cell' [patent_app_type] => B1 [patent_app_number] => 09/564413 [patent_app_country] => US [patent_app_date] => 2000-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5889 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404018.pdf [firstpage_image] =>[orig_patent_app_number] => 09564413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/564413
Static memory cell and method of manufacturing a static memory cell May 1, 2000 Issued
Array ( [id] => 1561783 [patent_doc_number] => 06437411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Semiconductor device having chamfered silicide layer and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/536427 [patent_app_country] => US [patent_app_date] => 2000-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 40 [patent_no_of_words] => 11676 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437411.pdf [firstpage_image] =>[orig_patent_app_number] => 09536427 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/536427
Semiconductor device having chamfered silicide layer and method for manufacturing the same Mar 26, 2000 Issued
Array ( [id] => 1360348 [patent_doc_number] => 06576966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Field-effect transistor having multi-part channel' [patent_app_type] => B1 [patent_app_number] => 09/535434 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 47 [patent_no_of_words] => 11582 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/576/06576966.pdf [firstpage_image] =>[orig_patent_app_number] => 09535434 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/535434
Field-effect transistor having multi-part channel Mar 22, 2000 Issued
Array ( [id] => 4333434 [patent_doc_number] => 06320223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Electronic device comprising a trench gate field effect device' [patent_app_type] => 1 [patent_app_number] => 9/527277 [patent_app_country] => US [patent_app_date] => 2000-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7938 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/320/06320223.pdf [firstpage_image] =>[orig_patent_app_number] => 527277 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/527277
Electronic device comprising a trench gate field effect device Mar 16, 2000 Issued
Array ( [id] => 4360803 [patent_doc_number] => 06218716 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Enhanced structure for salicide MOSFET' [patent_app_type] => 1 [patent_app_number] => 9/527607 [patent_app_country] => US [patent_app_date] => 2000-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 2911 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218716.pdf [firstpage_image] =>[orig_patent_app_number] => 527607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/527607
Enhanced structure for salicide MOSFET Mar 16, 2000 Issued
Array ( [id] => 6883977 [patent_doc_number] => 20010038132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Porous silicon oxycarbide integrated circuit insulator' [patent_app_type] => new [patent_app_number] => 09/517029 [patent_app_country] => US [patent_app_date] => 2000-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3140 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038132.pdf [firstpage_image] =>[orig_patent_app_number] => 09517029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/517029
Porous silicon oxycarbide integrated circuit insulator Mar 1, 2000 Issued
Array ( [id] => 1597150 [patent_doc_number] => 06384468 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Capacitor and method for forming same' [patent_app_type] => B1 [patent_app_number] => 09/499577 [patent_app_country] => US [patent_app_date] => 2000-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2832 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384468.pdf [firstpage_image] =>[orig_patent_app_number] => 09499577 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/499577
Capacitor and method for forming same Feb 6, 2000 Issued
Array ( [id] => 1421782 [patent_doc_number] => 06509649 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Semiconductor device and fabricating method thereof' [patent_app_type] => B1 [patent_app_number] => 09/499147 [patent_app_country] => US [patent_app_date] => 2000-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2082 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509649.pdf [firstpage_image] =>[orig_patent_app_number] => 09499147 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/499147
Semiconductor device and fabricating method thereof Feb 6, 2000 Issued
Array ( [id] => 1364575 [patent_doc_number] => 06573577 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => B1 [patent_app_number] => 09/496944 [patent_app_country] => US [patent_app_date] => 2000-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 132 [patent_no_of_words] => 33059 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573577.pdf [firstpage_image] =>[orig_patent_app_number] => 09496944 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/496944
Semiconductor device and method for fabricating the same Feb 2, 2000 Issued
Array ( [id] => 1421239 [patent_doc_number] => 06509604 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-21 [patent_title] => 'Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation' [patent_app_type] => B1 [patent_app_number] => 09/491457 [patent_app_country] => US [patent_app_date] => 2000-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2336 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/509/06509604.pdf [firstpage_image] =>[orig_patent_app_number] => 09491457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491457
Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation Jan 25, 2000 Issued
Array ( [id] => 1452238 [patent_doc_number] => 06455903 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Dual threshold voltage MOSFET by local confinement of channel depletion layer using inert ion implantation' [patent_app_type] => B1 [patent_app_number] => 09/491267 [patent_app_country] => US [patent_app_date] => 2000-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/455/06455903.pdf [firstpage_image] =>[orig_patent_app_number] => 09491267 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491267
Dual threshold voltage MOSFET by local confinement of channel depletion layer using inert ion implantation Jan 25, 2000 Issued
Array ( [id] => 1496841 [patent_doc_number] => 06403976 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Semiconductor crystal, fabrication method thereof, and semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/482077 [patent_app_country] => US [patent_app_date] => 2000-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4996 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/403/06403976.pdf [firstpage_image] =>[orig_patent_app_number] => 09482077 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/482077
Semiconductor crystal, fabrication method thereof, and semiconductor device Jan 12, 2000 Issued
Array ( [id] => 4376590 [patent_doc_number] => 06288432 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Semiconductor fabrication employing a post-implant anneal within a low temperature, high pressure nitrogen ambient to improve channel and gate oxide reliability' [patent_app_type] => 1 [patent_app_number] => 9/481808 [patent_app_country] => US [patent_app_date] => 2000-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5080 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288432.pdf [firstpage_image] =>[orig_patent_app_number] => 481808 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/481808
Semiconductor fabrication employing a post-implant anneal within a low temperature, high pressure nitrogen ambient to improve channel and gate oxide reliability Jan 10, 2000 Issued
Array ( [id] => 1563040 [patent_doc_number] => 06362497 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Semiconductor integrated circuit having ESD/EOS protection' [patent_app_type] => B1 [patent_app_number] => 09/479117 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4745 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362497.pdf [firstpage_image] =>[orig_patent_app_number] => 09479117 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/479117
Semiconductor integrated circuit having ESD/EOS protection Jan 6, 2000 Issued
Array ( [id] => 1561716 [patent_doc_number] => 06437392 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Article comprising a dielectric material of ZR-Ge-Ti-O or Hf-Ge-Ti-O and method of making the same' [patent_app_type] => B1 [patent_app_number] => 09/456807 [patent_app_country] => US [patent_app_date] => 1999-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3438 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437392.pdf [firstpage_image] =>[orig_patent_app_number] => 09456807 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/456807
Article comprising a dielectric material of ZR-Ge-Ti-O or Hf-Ge-Ti-O and method of making the same Dec 7, 1999 Issued
Menu