Search

Martin Lerner

Examiner (ID: 177, Phone: (571)272-7608 , Office: P/2657 )

Most Active Art Unit
2657
Art Unit(s)
2654, 2741, 2657, 2658, 2641, 2626
Total Applications
1587
Issued Applications
1172
Pending Applications
122
Abandoned Applications
292

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3709260 [patent_doc_number] => 05619718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Associative memory processing method for natural language parsing and pattern recognition' [patent_app_type] => 1 [patent_app_number] => 8/557729 [patent_app_country] => US [patent_app_date] => 1995-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8752 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619718.pdf [firstpage_image] =>[orig_patent_app_number] => 557729 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/557729
Associative memory processing method for natural language parsing and pattern recognition Nov 12, 1995 Issued
Array ( [id] => 3735732 [patent_doc_number] => 05701421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Pin and status bus structure for an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/555961 [patent_app_country] => US [patent_app_date] => 1995-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 40 [patent_no_of_words] => 27465 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701421.pdf [firstpage_image] =>[orig_patent_app_number] => 555961 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/555961
Pin and status bus structure for an integrated circuit Nov 12, 1995 Issued
Array ( [id] => 3917822 [patent_doc_number] => 05751951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Network interface' [patent_app_type] => 1 [patent_app_number] => 8/549940 [patent_app_country] => US [patent_app_date] => 1995-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 15880 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751951.pdf [firstpage_image] =>[orig_patent_app_number] => 549940 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/549940
Network interface Oct 29, 1995 Issued
Array ( [id] => 3506284 [patent_doc_number] => 05537609 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Mini cache operational module for enhancement to general cache' [patent_app_type] => 1 [patent_app_number] => 8/547260 [patent_app_country] => US [patent_app_date] => 1995-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6405 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537609.pdf [firstpage_image] =>[orig_patent_app_number] => 547260 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/547260
Mini cache operational module for enhancement to general cache Oct 23, 1995 Issued
Array ( [id] => 3894901 [patent_doc_number] => 05799181 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Bossless architecture and digital cell technology for computer programs' [patent_app_type] => 1 [patent_app_number] => 8/539806 [patent_app_country] => US [patent_app_date] => 1995-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9232 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/799/05799181.pdf [firstpage_image] =>[orig_patent_app_number] => 539806 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/539806
Bossless architecture and digital cell technology for computer programs Oct 4, 1995 Issued
Array ( [id] => 3734852 [patent_doc_number] => 05682534 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-28 [patent_title] => 'Transparent local RPC optimization' [patent_app_type] => 1 [patent_app_number] => 8/526833 [patent_app_country] => US [patent_app_date] => 1995-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 7304 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/682/05682534.pdf [firstpage_image] =>[orig_patent_app_number] => 526833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/526833
Transparent local RPC optimization Sep 11, 1995 Issued
Array ( [id] => 3878696 [patent_doc_number] => 05797028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Computer system having an improved digital and analog configuration' [patent_app_type] => 1 [patent_app_number] => 8/526488 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7318 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/797/05797028.pdf [firstpage_image] =>[orig_patent_app_number] => 526488 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/526488
Computer system having an improved digital and analog configuration Sep 10, 1995 Issued
Array ( [id] => 3855186 [patent_doc_number] => 05708838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Distributed processing systems having a host processor and at least one object oriented processor' [patent_app_type] => 1 [patent_app_number] => 8/525948 [patent_app_country] => US [patent_app_date] => 1995-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11265 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708838.pdf [firstpage_image] =>[orig_patent_app_number] => 525948 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/525948
Distributed processing systems having a host processor and at least one object oriented processor Sep 7, 1995 Issued
Array ( [id] => 3825422 [patent_doc_number] => 05710937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Sorting apparatus' [patent_app_type] => 1 [patent_app_number] => 8/517987 [patent_app_country] => US [patent_app_date] => 1995-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4012 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710937.pdf [firstpage_image] =>[orig_patent_app_number] => 517987 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/517987
Sorting apparatus Aug 21, 1995 Issued
Array ( [id] => 3804102 [patent_doc_number] => 05737630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'Communication device for synchronized serial communication' [patent_app_type] => 1 [patent_app_number] => 8/515571 [patent_app_country] => US [patent_app_date] => 1995-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 26 [patent_no_of_words] => 3789 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737630.pdf [firstpage_image] =>[orig_patent_app_number] => 515571 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/515571
Communication device for synchronized serial communication Aug 15, 1995 Issued
Array ( [id] => 3710132 [patent_doc_number] => 05675360 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Information processing apparatus having a keyboard with a pointing device' [patent_app_type] => 1 [patent_app_number] => 8/513522 [patent_app_country] => US [patent_app_date] => 1995-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4312 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675360.pdf [firstpage_image] =>[orig_patent_app_number] => 513522 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/513522
Information processing apparatus having a keyboard with a pointing device Aug 9, 1995 Issued
08/511765 MICROCOMPUTER SYSTEM Aug 6, 1995 Abandoned
Array ( [id] => 3681409 [patent_doc_number] => 05600794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-04 [patent_title] => 'Method and apparatus for managing exchange of metrics in a computer network by exchanging only metrics used by a node in the network' [patent_app_type] => 1 [patent_app_number] => 8/511393 [patent_app_country] => US [patent_app_date] => 1995-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/600/05600794.pdf [firstpage_image] =>[orig_patent_app_number] => 511393 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511393
Method and apparatus for managing exchange of metrics in a computer network by exchanging only metrics used by a node in the network Aug 3, 1995 Issued
Array ( [id] => 3700509 [patent_doc_number] => 05644720 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Interprocess communications interface for managing transaction requests' [patent_app_type] => 1 [patent_app_number] => 8/509124 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3779 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644720.pdf [firstpage_image] =>[orig_patent_app_number] => 509124 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509124
Interprocess communications interface for managing transaction requests Jul 30, 1995 Issued
Array ( [id] => 3667208 [patent_doc_number] => 05623619 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Linearly addressable microprocessor cache' [patent_app_type] => 1 [patent_app_number] => 8/506509 [patent_app_country] => US [patent_app_date] => 1995-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9098 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623619.pdf [firstpage_image] =>[orig_patent_app_number] => 506509 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/506509
Linearly addressable microprocessor cache Jul 23, 1995 Issued
Array ( [id] => 3808793 [patent_doc_number] => 05727226 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Method and apparatus for modulation of multi-dimensional data in holographic storage' [patent_app_type] => 1 [patent_app_number] => 8/504204 [patent_app_country] => US [patent_app_date] => 1995-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 13358 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/727/05727226.pdf [firstpage_image] =>[orig_patent_app_number] => 504204 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/504204
Method and apparatus for modulation of multi-dimensional data in holographic storage Jul 17, 1995 Issued
Array ( [id] => 3808498 [patent_doc_number] => 05727208 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Method and apparatus for configuration of processor operating parameters' [patent_app_type] => 1 [patent_app_number] => 8/497955 [patent_app_country] => US [patent_app_date] => 1995-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4202 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/727/05727208.pdf [firstpage_image] =>[orig_patent_app_number] => 497955 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/497955
Method and apparatus for configuration of processor operating parameters Jul 2, 1995 Issued
Array ( [id] => 3661186 [patent_doc_number] => 05640586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-17 [patent_title] => 'Scalable parallel group partitioned diagonal-fold switching tree computing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/496826 [patent_app_country] => US [patent_app_date] => 1995-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 79 [patent_figures_cnt] => 23 [patent_no_of_words] => 9399 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/640/05640586.pdf [firstpage_image] =>[orig_patent_app_number] => 496826 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/496826
Scalable parallel group partitioned diagonal-fold switching tree computing apparatus Jun 28, 1995 Issued
08/496690 CALL SET-UP SERVER Jun 28, 1995 Abandoned
Array ( [id] => 3601713 [patent_doc_number] => 05517655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Method for monitoring transactions in an object-oriented environment' [patent_app_type] => 1 [patent_app_number] => 8/495300 [patent_app_country] => US [patent_app_date] => 1995-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10859 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517655.pdf [firstpage_image] =>[orig_patent_app_number] => 495300 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/495300
Method for monitoring transactions in an object-oriented environment Jun 27, 1995 Issued
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