Search

Marvin Payen

Examiner (ID: 6852, Phone: (571)270-7435 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2894, 2816
Total Applications
919
Issued Applications
787
Pending Applications
28
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14252491 [patent_doc_number] => 10276452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-30 [patent_title] => Low undercut N-P work function metal patterning in nanosheet replacement metal gate process [patent_app_type] => utility [patent_app_number] => 15/867834 [patent_app_country] => US [patent_app_date] => 2018-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5378 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15867834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/867834
Low undercut N-P work function metal patterning in nanosheet replacement metal gate process Jan 10, 2018 Issued
Array ( [id] => 13306741 [patent_doc_number] => 20180204907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => POWER METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR DEVICE WITH THREE-DIMENSIONAL SUPER JUNCTION AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/867744 [patent_app_country] => US [patent_app_date] => 2018-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15867744 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/867744
Power metal-oxide-semiconductor field-effect transistor device with three-dimensional super junction and fabrication method thereof Jan 10, 2018 Issued
Array ( [id] => 16928363 [patent_doc_number] => 11049854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-29 [patent_title] => MIMCAP creation and utilization methodology [patent_app_type] => utility [patent_app_number] => 15/860748 [patent_app_country] => US [patent_app_date] => 2018-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6944 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15860748 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/860748
MIMCAP creation and utilization methodology Jan 2, 2018 Issued
Array ( [id] => 13740727 [patent_doc_number] => 20180374833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => LOWER IC PACKAGE STRUCTURE FOR COUPLING WITH AN UPPER IC PACKAGE TO FORM A PACKAGE-ON-PACKAGE (PoP) ASSEMBLY AND PoP ASSEMBLY INCLUDING SUCH A LOWER IC PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/861421 [patent_app_country] => US [patent_app_date] => 2018-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15861421 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/861421
Lower IC package structure for coupling with an upper IC package to form a package-on-package (PoP) assembly and PoP assembly including such a lower IC package structure Jan 2, 2018 Issued
Array ( [id] => 12717346 [patent_doc_number] => 20180130948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => APPARATUSES INCLUDING ELECTRODES HAVING A CONDUCTIVE BARRIER MATERIAL AND METHODS OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 15/848477 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848477
Apparatuses including electrodes having a conductive barrier material and methods of forming same Dec 19, 2017 Issued
Array ( [id] => 17574453 [patent_doc_number] => 11322728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Display panel and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/341446 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4205 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16341446 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/341446
Display panel and manufacturing method thereof Dec 11, 2017 Issued
Array ( [id] => 12650697 [patent_doc_number] => 20180108730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => METHOD FOR MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE AND SILICON CARBIDE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/836348 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15836348 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/836348
Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device Dec 7, 2017 Issued
Array ( [id] => 12263720 [patent_doc_number] => 20180082916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'FINE PITCH BVA USING RECONSTITUTED WAFER WITH AREA ARRAY ACCESSIBLE FOR TESTING' [patent_app_type] => utility [patent_app_number] => 15/827550 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8785 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15827550 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/827550
Fine pitch BVA using reconstituted wafer with area array accessible for testing Nov 29, 2017 Issued
Array ( [id] => 16308600 [patent_doc_number] => 10777406 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Method of making graphene and graphene devices [patent_app_type] => utility [patent_app_number] => 15/825209 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2600 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15825209 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/825209
Method of making graphene and graphene devices Nov 28, 2017 Issued
Array ( [id] => 13306515 [patent_doc_number] => 20180204794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-19 [patent_title] => REDUCING TIP-TO-TIP DISTANCE BETWEEN END PORTIONS OF METAL LINES FORMED IN AN INTERCONNECT LAYER OF AN INTEGRATED CIRCUIT (IC) [patent_app_type] => utility [patent_app_number] => 15/825231 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15825231 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/825231
Reducing tip-to-tip distance between end portions of metal lines formed in an interconnect layer of an integrated circuit (IC) Nov 28, 2017 Issued
Array ( [id] => 14374857 [patent_doc_number] => 20190161341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => SYSTEMS AND METHODS FOR TEMPERATURE SENSOR ACCESS IN DIE STACKS [patent_app_type] => utility [patent_app_number] => 15/824559 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5820 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824559 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824559
Systems and methods for temperature sensor access in die stacks Nov 27, 2017 Issued
Array ( [id] => 16653353 [patent_doc_number] => 10930546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => TFT substrate and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/740286 [patent_app_country] => US [patent_app_date] => 2017-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3830 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15740286 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/740286
TFT substrate and method for manufacturing the same Nov 22, 2017 Issued
Array ( [id] => 15274769 [patent_doc_number] => 20190386119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => METHOD OF STABLIZING IGZO THIN FILM TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/740692 [patent_app_country] => US [patent_app_date] => 2017-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15740692 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/740692
METHOD OF STABLIZING IGZO THIN FILM TRANSISTOR Nov 22, 2017 Abandoned
Array ( [id] => 14205351 [patent_doc_number] => 10269799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Field effect transistor contact with reduced contact resistance [patent_app_type] => utility [patent_app_number] => 15/803083 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15803083 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/803083
Field effect transistor contact with reduced contact resistance Nov 2, 2017 Issued
Array ( [id] => 14063831 [patent_doc_number] => 10236217 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-03-19 [patent_title] => Stacked field-effect transistors (FETs) with shared and non-shared gates [patent_app_type] => utility [patent_app_number] => 15/802062 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7902 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802062 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802062
Stacked field-effect transistors (FETs) with shared and non-shared gates Nov 1, 2017 Issued
Array ( [id] => 14677001 [patent_doc_number] => 20190237615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => Semiconductor Body [patent_app_type] => utility [patent_app_number] => 16/342163 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3728 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16342163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/342163
Semiconductor body Oct 22, 2017 Issued
Array ( [id] => 14722779 [patent_doc_number] => 20190252453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => Image sensors with enhanced wide-angle performance [patent_app_type] => utility [patent_app_number] => 16/341906 [patent_app_country] => US [patent_app_date] => 2017-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16341906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/341906
Image sensors with enhanced wide-angle performance Oct 18, 2017 Issued
Array ( [id] => 14889361 [patent_doc_number] => 10424732 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Fin selector with gated RRAM [patent_app_type] => utility [patent_app_number] => 15/729314 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 4483 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729314 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729314
Fin selector with gated RRAM Oct 9, 2017 Issued
Array ( [id] => 15315387 [patent_doc_number] => 10522407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-31 [patent_title] => FinFET channel on oxide structures and related methods [patent_app_type] => utility [patent_app_number] => 15/714557 [patent_app_country] => US [patent_app_date] => 2017-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 10828 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15714557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/714557
FinFET channel on oxide structures and related methods Sep 24, 2017 Issued
Array ( [id] => 12154802 [patent_doc_number] => 20180026066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'BACK-SIDE ILLUMINATED (BSI) IMAGE SENSOR WITH GLOBAL SHUTTER SCHEME' [patent_app_type] => utility [patent_app_number] => 15/710419 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6223 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710419
Back-side illuminated (BSI) image sensor with global shutter scheme Sep 19, 2017 Issued
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