Search

Marvin Payen

Examiner (ID: 6852, Phone: (571)270-7435 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2894, 2816
Total Applications
919
Issued Applications
787
Pending Applications
28
Abandoned Applications
115

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19502186 [patent_doc_number] => 20240341204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => HIGH-FREQUENCY, LOW-VOLTAGE SWITCH DEVICES AND METHODS OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 18/298132 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298132
HIGH-FREQUENCY, LOW-VOLTAGE SWITCH DEVICES AND METHODS OF MANUFACTURING THEREOF Apr 9, 2023 Pending
Array ( [id] => 19612160 [patent_doc_number] => 12161055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Memory array, semiconductor chip and manufacturing method of memory array [patent_app_type] => utility [patent_app_number] => 18/191885 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191885 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191885
Memory array, semiconductor chip and manufacturing method of memory array Mar 28, 2023 Issued
Array ( [id] => 20244240 [patent_doc_number] => 12424572 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/168038 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 1043 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18168038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/168038
Semiconductor device Feb 12, 2023 Issued
Array ( [id] => 20443134 [patent_doc_number] => 12513980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Stacked vertical transport field effect transistor with anchors [patent_app_type] => utility [patent_app_number] => 18/068155 [patent_app_country] => US [patent_app_date] => 2022-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18068155 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/068155
Stacked vertical transport field effect transistor with anchors Dec 18, 2022 Issued
Array ( [id] => 19567757 [patent_doc_number] => 12142536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Method of detecting a possible thinning of a substrate of an integrated circuit via the rear face thereof, and associated device [patent_app_type] => utility [patent_app_number] => 18/082155 [patent_app_country] => US [patent_app_date] => 2022-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4503 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18082155 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/082155
Method of detecting a possible thinning of a substrate of an integrated circuit via the rear face thereof, and associated device Dec 14, 2022 Issued
Array ( [id] => 19928453 [patent_doc_number] => 12302767 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Buffer layer in memory cell to prevent metal redeposition [patent_app_type] => utility [patent_app_number] => 18/076726 [patent_app_country] => US [patent_app_date] => 2022-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 5534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076726 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/076726
Buffer layer in memory cell to prevent metal redeposition Dec 6, 2022 Issued
Array ( [id] => 18251334 [patent_doc_number] => 20230078373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => VARIABLE RESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/989085 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989085 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989085
VARIABLE RESISTANCE MEMORY DEVICE Nov 16, 2022 Pending
Array ( [id] => 18320272 [patent_doc_number] => 20230118400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/977164 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17977164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/977164
Semiconductor package and manufacturing method thereof Oct 30, 2022 Issued
Array ( [id] => 18162936 [patent_doc_number] => 20230029529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => DEVICES INCLUDING A PASSIVE MATERIAL BETWEEN MEMORY CELLS AND CONDUCTIVE ACCESS LINES, AND RELATED ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 17/937094 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937094 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937094
Devices including a passive material between memory cells and conductive access lines, and related electronic devices Sep 29, 2022 Issued
Array ( [id] => 18146453 [patent_doc_number] => 20230020310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => Impedance Controlled Electrical Interconnection Employing Meta-Materials [patent_app_type] => utility [patent_app_number] => 17/952838 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952838
Impedance controlled electrical interconnection employing meta-materials Sep 25, 2022 Issued
Array ( [id] => 19000959 [patent_doc_number] => 11917837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Method of forming the semiconductor device [patent_app_type] => utility [patent_app_number] => 17/897221 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 6474 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897221
Method of forming the semiconductor device Aug 28, 2022 Issued
Array ( [id] => 19110235 [patent_doc_number] => 11963369 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Memory array with asymmetric bit-line architecture [patent_app_type] => utility [patent_app_number] => 17/874448 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 11474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874448 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874448
Memory array with asymmetric bit-line architecture Jul 26, 2022 Issued
Array ( [id] => 20307081 [patent_doc_number] => 12453092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Semiconductor device and fabrication method therefor [patent_app_type] => utility [patent_app_number] => 17/874861 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874861
Semiconductor device and fabrication method therefor Jul 26, 2022 Issued
Array ( [id] => 20307081 [patent_doc_number] => 12453092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Semiconductor device and fabrication method therefor [patent_app_type] => utility [patent_app_number] => 17/874861 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 10570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874861 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874861
Semiconductor device and fabrication method therefor Jul 26, 2022 Issued
Array ( [id] => 17993717 [patent_doc_number] => 20220359754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => METHOD OF FABRICATING A MULTI-GATE DEVICE [patent_app_type] => utility [patent_app_number] => 17/812997 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812997 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812997
Method of fabricating a multi-gate device Jul 14, 2022 Issued
Array ( [id] => 19183782 [patent_doc_number] => 11990382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Fine pitch BVA using reconstituted wafer with area array accessible for testing [patent_app_type] => utility [patent_app_number] => 17/865994 [patent_app_country] => US [patent_app_date] => 2022-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 8664 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865994 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865994
Fine pitch BVA using reconstituted wafer with area array accessible for testing Jul 14, 2022 Issued
Array ( [id] => 19081127 [patent_doc_number] => 11950523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Memory device, memory integrated circuit and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/857156 [patent_app_country] => US [patent_app_date] => 2022-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857156 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/857156
Memory device, memory integrated circuit and manufacturing method thereof Jul 3, 2022 Issued
Array ( [id] => 18587687 [patent_doc_number] => 20230269952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 17/810590 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6929 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810590 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/810590
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Jun 30, 2022 Pending
Array ( [id] => 18868204 [patent_doc_number] => 20230422641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => CMOS-COMPATIBLE RRAM DEVICES [patent_app_type] => utility [patent_app_number] => 17/848238 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848238
CMOS-COMPATIBLE RRAM DEVICES Jun 22, 2022 Pending
Array ( [id] => 18868204 [patent_doc_number] => 20230422641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => CMOS-COMPATIBLE RRAM DEVICES [patent_app_type] => utility [patent_app_number] => 17/848238 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848238
CMOS-COMPATIBLE RRAM DEVICES Jun 22, 2022 Pending
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