Marvin Payen

Array ( [id] => 11367028 [patent_doc_number] => 20170005008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/814516 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4636 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814516 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11424875 [patent_doc_number] => 20170033022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'METHOD OF CONTROLLING ETCH-PATTERN DENSITY AND DEVICE MADE USING SUCH METHOD' [patent_app_type] => utility [patent_app_number] => 14/814703 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814703 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11425072 [patent_doc_number] => 20170033218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'Method for Detecting Presence and Location of Defects in a Substrate' [patent_app_type] => utility [patent_app_number] => 14/814959 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6907 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14814959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11425070 [patent_doc_number] => 20170033216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/815068 [patent_app_country] => US [patent_app_date] => 2015-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 6401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14815068 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12146341 [patent_doc_number] => 09880594 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Thermal management for solid-state drive' [patent_app_type] => utility [patent_app_number] => 14/810391 [patent_app_country] => US [patent_app_date] => 2015-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4022 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14810391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10502536 [patent_doc_number] => 09230939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Method for producing image pickup apparatus, method for producing semiconductor apparatus, and joined wafer' [patent_app_type] => utility [patent_app_number] => 14/808054 [patent_app_country] => US [patent_app_date] => 2015-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 7979 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14808054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11983572 [patent_doc_number] => 20170287727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'METAL HARD MASK AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 15/513718 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4601 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15513718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11740263 [patent_doc_number] => 09704858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Integrated device having multiple transistors' [patent_app_type] => utility [patent_app_number] => 14/795622 [patent_app_country] => US [patent_app_date] => 2015-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 10269 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795622 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12175132 [patent_doc_number] => 09893280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-13 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 14/793891 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 4466 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793891 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11391772 [patent_doc_number] => 09553022 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-24 [patent_title] => 'Method for use in manufacturing a semiconductor device die' [patent_app_type] => utility [patent_app_number] => 14/792419 [patent_app_country] => US [patent_app_date] => 2015-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7707 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792419 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11367022 [patent_doc_number] => 20170005002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-05 [patent_title] => 'FINFET CHANNEL ON OXIDE STRUCTURES AND RELATED METHODS' [patent_app_type] => utility [patent_app_number] => 14/788300 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 11442 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10409933 [patent_doc_number] => 20150294942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'INDEXING OF ELECTRONIC DEVICES DISTRIBUTED ON DIFFERENT CHIPS' [patent_app_type] => utility [patent_app_number] => 14/750466 [patent_app_country] => US [patent_app_date] => 2015-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4924 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14750466 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11770438 [patent_doc_number] => 09379135 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'FinFET semiconductor device having increased gate height control' [patent_app_type] => utility [patent_app_number] => 14/723681 [patent_app_country] => US [patent_app_date] => 2015-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4469 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14723681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10364138 [patent_doc_number] => 20150249144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-03 [patent_title] => 'High Voltage Drain-Extended MOSFET Having Extra Drain-OD Addition' [patent_app_type] => utility [patent_app_number] => 14/715150 [patent_app_country] => US [patent_app_date] => 2015-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2548 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14715150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10138635 [patent_doc_number] => 09171959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/700528 [patent_app_country] => US [patent_app_date] => 2015-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 22998 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10336862 [patent_doc_number] => 20150221867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'FIN SELECTOR WITH GATED RRAM' [patent_app_type] => utility [patent_app_number] => 14/689654 [patent_app_country] => US [patent_app_date] => 2015-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4616 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14689654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11466807 [patent_doc_number] => 09583447 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-28 [patent_title] => 'EMI shielding method of semiconductor packages' [patent_app_type] => utility [patent_app_number] => 14/915321 [patent_app_country] => US [patent_app_date] => 2015-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2445 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14915321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10336590 [patent_doc_number] => 20150221595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-06 [patent_title] => 'Impedance Controlled Electrical Interconnection Employing Meta-Materials' [patent_app_type] => utility [patent_app_number] => 14/685432 [patent_app_country] => US [patent_app_date] => 2015-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6852 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11227529 [patent_doc_number] => 09455255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-27 [patent_title] => 'Fin-type field effect transistor and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 14/674873 [patent_app_country] => US [patent_app_date] => 2015-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2874 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14674873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11233849 [patent_doc_number] => 09461084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Image sensor having shielding structure' [patent_app_type] => utility [patent_app_number] => 14/626549 [patent_app_country] => US [patent_app_date] => 2015-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 8943 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14626549 [rel_patent_id] =>[rel_patent_doc_number] =>)